3 - 组合逻辑代码设计和仿真
补码转换
代码:
//2021.11.18 lyw
//Complement conversion
`timescale 1ns/10ps
module comp_conv (
a,
a_comp
);
input[7:0] a;
output[7:0] a_comp;
assign a_comp=a[7]?{a[7],~a[6:0]+1}:a;
endmodule
//----testbench of comp_conv----
module comp_conv_tb;
reg[7:0] a_in;
wire[7:0] y_out;
comp_conv comp_conv (
.a(a_in),
.a_comp(y_out)
);
initial begin
a_in<=0;
#3000 $stop;
//2^8=256,256*10ns=2560ns
end
always #10 a_in <= a_in+1;
endmodule
关键:位拼接与二选一结合实现补码转换;always 语句实现多位循环。
仿真波形:
7 段数码管译码器
代码:
//2021.11.18 lyw
//Seven-segment decoder
module seg_dec (
num,
a_g
);
input[3:0] num;
output[6:0] a_g; //a_g-->{a,b,c,d,e,f,g}
reg[6:0] a_g;
always @(num) begin
case(num)
4'd0:begin a_g<=7'b111_1110; end
4'd1:begin a_g<=7'b011_0000; end
4'd2:begin a_g<=7'b110_1101; end
4'd3:begin a_g<=7'b111_1100; end
4'd4:begin a_g<=7'b011_0011; end
4'd5:begin a_g<=7'b101_1011; end
4'd6:begin a_g<=7'b101_1111; end
4'd7:begin a_g<=7'b111_0000; end
4'd8:begin a_g<=7'b111_1111; end
4'd9:begin a_g<=7'b111_1011; end
default:begin a_g<=7'b000_0001; end //middle bar
endcase
end
endmodule
//-----testbench of seg_dec------
module seg_dec_tb;
reg[3:0] num;
wire[6:0] a_g;
seg_dec seg_dec (
.num(num),
.a_g(a_g)
);
initial begin
num<=0;
#200 $stop;
end
always #10 num <= num+1;
endmodule
关键:case 的 default 处理。
仿真波形:
PS:学习内容总结自网络,主讲教师为北京交通大学李金城老师。