2 - 组合逻辑代码设计和仿真
用问号冒号语句实现二选一:
用 always 语句块实现组合逻辑:
用 if-else 实现二选一:
//2021.11.17 lyw
//2 choose 1 logic design
`timescale 1ns/10ps
module fn_sw (
a,
b,
sel,
y
);
input a;
input b;
input sel;
output y;
//use 'assign' to implement combinatorial logic
//assign y=sel?(a^b):(a&b);
//use 'always' to implement combinatorial logic
reg y;
always @(a or b or sel) begin
if(sel == 1)begin
y <= a^b;
end
else begin
y <= a&b;
end
end
endmodule
//------testbench of fn_sw-----
module fn_sw_tb;
reg a,b,sel;
wire y;
fn_sw fn_sw (
.a(a),
.b(b),
.sel(sel),
.y(y)
);
initial begin
a=0;b=0;sel=0;
#10 a=0;b=0;sel=1;
#10 a=0;b=1;sel=0;
#10 a=0;b=1;sel=1;
#10 a=1;b=0;sel=0;
#10 a=1;b=0;sel=1;
#10 a=1;b=1;sel=0;
#10 a=1;b=1;sel=1;
#10 $stop;
end
endmodule
二选一仿真波形:
四选一组合逻辑实现:
四选一代码:
关键:用 case 语句实现多路选择,以及用 always # 语句遍历逻辑值。
//2021.11.17 lyw
//4 choose 1
`timescale 1ns/10ps
module fn_sw_4 (
a,
b,
sel,
y
);
input a;
input b;
input[1:0] sel;
output y;
reg y;
always @(a or b or sel) begin
case (sel)
2'b00: begin y=a&b; end
2'b01: begin y=a|b; end
2'b10: begin y=a^b; end
2'b11: begin y=~(a^b); end
endcase
end
endmodule
//-----testbench of fn_sw_4---------
module fn_sw_4_tb;
reg[3:0] absel;
wire yy;
fn_sw_4 fn_sw_4 (
.a(absel[0]),
.b(absel[1]),
.sel(absel[3:2]),
.y(yy)
);
initial begin
absel<=0;
#200 $stop;
end
always #10 absel<=absel+1;
endmodule
四选一仿真波形:
PS:
学习内容总结自网络,主讲教师为北京交通大学李金城老师。