FPGA入门学习笔记（二十）Vivado设计VGA控制器_板级验证

NonnettaWu

已于 2023-05-17 20:05:19 修改

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分类专栏： FPGA 文章标签： fpga开发学习

于 2023-04-07 19:42:21 首次发布

本文链接：https://blog.csdn.net/weixin_45463952/article/details/130019143

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设计文件程序

`timescale 1ns/1ns
module VGA_CTRL(
        Clk,
        Reset_N,
        Data,
        H_Location,
        V_Location,
        Data_Req,
        VGA_HS,
        VGA_VS,
        VGA_BLK,
        VGA_RGB
    );
    input Clk;
    input Reset_N;
    input [23:0]Data;
    output reg [11:0]H_Location;
    output reg [11:0]V_Location;
    output reg Data_Req;
    output reg VGA_HS;
    output reg VGA_VS;
    output reg VGA_BLK;
    output reg [23:0]VGA_RGB; // {Red:[7:0],Green:[7:0],Blue:[7:0]}
    
    localparam Hsync_End = 1344;
    localparam Hs_End = 136;
    localparam Vsync_End = 628;
    localparam Vs_End = 4;
    localparam Hdata_Begin = 296;
    localparam Hdata_End = 1320;
    localparam Vdata_Begin = 27;
    localparam Vdata_End = 627;
    
    reg [11:0]H_cnt;
    always@(posedge Clk or negedge Reset_N)
    if(!Reset_N)
        H_cnt <= 0;
    else if(H_cnt >= Hsync_End - 1)
        H_cnt <= 0;
    else
        H_cnt <= H_cnt + 1'b1;

    always@(posedge Clk)
        VGA_HS <= (H_cnt < Hs_End)?0:1;
    
    reg [11:0]V_cnt;
    always@(posedge Clk or negedge Reset_N)
    if(!Reset_N)
        V_cnt <= 0;
    else if(H_cnt == Hsync_End - 1)begin
        if(V_cnt >= Vsync_End - 1)
            V_cnt <= 0;
        else
            V_cnt <= V_cnt + 1'b1;
    end
    
    always@(posedge Clk)
        VGA_VS <= (V_cnt < Vs_End)?0:1; 
    
    always@(posedge Clk)
        Data_Req <= ((H_cnt >= Hdata_Begin - 1'd1) && (H_cnt < Hdata_End -1'd1) && (V_cnt >= Vdata_Begin) && (V_cnt < Vdata_End - 1'd1))?1:0;

    //BLK表示数据有效输出的时间段
    always@(posedge Clk)
        VGA_BLK <= Data_Req;

    always@(posedge Clk)    
        VGA_RGB <= Data_Req?Data:0;
        
    always@(posedge Clk)    
        H_Location <= Data_Req?(H_cnt - Hdata_Begin):0;
    always@(posedge Clk)    
        V_Location <= Data_Req?(V_cnt - Vdata_Begin):0;
endmodule

module VGA_CTRL_Test(
    Clk,            //50MHZ时钟
    Reset_N,
    VGA_RGB,        //TFT数据输出
    VGA_HS,         //TFT行同步信号
    VGA_VS,         //TFT场同步信号
    VGA_BLK,        //VGA 场消隐信号
    VGA_CLK
);

    input Clk;
    input Reset_N;
    output [23:0]VGA_RGB;
    output VGA_HS;
    output VGA_VS;
    output VGA_BLK;     //VGA 场消隐信号
    output VGA_CLK;
        
    reg [23:0]disp_data;
    wire [11:0]H_Location;
    wire [11:0]V_Location;
	wire Data_Req;
	
    assign VGA_CLK = Clk;

    VGA_CTRL VGA_CTRL(
        .Clk(Clk),              //系统输入时钟50MHZ
        .Reset_N(Reset_N),
        .Data(disp_data),       //待显示数据
		.Data_Req(Data_Req),
        .H_Location(H_Location),//VGA行扫描计数器
        .V_Location(V_Location),//VGA场扫描计数器
        .VGA_RGB(VGA_RGB),      //VGA数据输出
        .VGA_HS(VGA_HS),        //VGA行同步信号
        .VGA_VS(VGA_VS),        //VGA场同步信号
        .VGA_BLK(VGA_BLK)       //VGA 场消隐信号
    );
        
//定义颜色编码
localparam 
    BLACK       = 24'h000000, //黑色
    BLUE        = 24'h0000FF, //蓝色
    RED         = 24'hFF0000, //红色
    PURPPLE     = 24'hFF00FF, //紫色
    GREEN       = 24'h00FF00, //绿色
    CYAN        = 24'h00FFFF, //青色
    YELLOW      = 24'hFFFF00, //黄色
    WHITE       = 24'hFFFFFF; //白色
    
//定义每个像素块的默认显示颜色值
localparam 
    R0_C0 = BLACK,  //第0行0列像素块
    R0_C1 = BLUE,   //第0行1列像素块
    R1_C0 = RED,    //第1行0列像素块
    R1_C1 = PURPPLE,//第1行1列像素块
    R2_C0 = GREEN,  //第2行0列像素块
    R2_C1 = CYAN,   //第2行1列像素块
    R3_C0 = YELLOW, //第3行0列像素块
    R3_C1 = WHITE;  //第3行1列像素块

    wire R0_act = V_Location >= 0 && V_Location < 150;  //正在扫描第0行
    wire R1_act = V_Location >= 150 && V_Location < 300;//正在扫描第1行
    wire R2_act = V_Location >= 300 && V_Location < 450;//正在扫描第2行
    wire R3_act = V_Location >= 450 && V_Location < 600;//正在扫描第3行
    
    wire C0_act = H_Location >= 0 && H_Location < 512; //正在扫描第0列
    wire C1_act = H_Location >= 512 && H_Location < 1024;//正在扫描第1列 
    
    wire R0_C0_act=R0_act & C0_act;//第0行0列像素块处于被扫描中标志信号
    wire R0_C1_act=R0_act & C1_act;//第0行1列像素块处于被扫描中标志信号
    wire R1_C0_act=R1_act & C0_act;//第1行0列像素块处于被扫描中标志信号
    wire R1_C1_act=R1_act & C1_act;//第1行1列像素块处于被扫描中标志信号
    wire R2_C0_act=R2_act & C0_act;//第2行0列像素块处于被扫描中标志信号
    wire R2_C1_act=R2_act & C1_act;//第2行1列像素块处于被扫描中标志信号
    wire R3_C0_act=R3_act & C0_act;//第3行0列像素块处于被扫描中标志信号
    wire R3_C1_act=R3_act & C1_act;//第3行1列像素块处于被扫描中标志信号
    
    always@(*)
        case({R3_C1_act,R3_C0_act,R2_C1_act,R2_C0_act,
                R1_C1_act,R1_C0_act,R0_C1_act,R0_C0_act})
            8'b0000_0001:disp_data = R0_C0;
            8'b0000_0010:disp_data = R0_C1;
            8'b0000_0100:disp_data = R1_C0;
            8'b0000_1000:disp_data = R1_C1;
            8'b0001_0000:disp_data = R2_C0;
            8'b0010_0000:disp_data = R2_C1;
            8'b0100_0000:disp_data = R3_C0;
            8'b1000_0000:disp_data = R3_C1;
            default:disp_data = R0_C0;
        endcase
        
endmodule

IO分配文件

set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[23]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[22]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[21]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[20]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[19]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[18]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[17]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[16]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[15]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[14]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[13]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[12]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[11]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {VGA_RGB[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports Clk]
set_property IOSTANDARD LVCMOS33 [get_ports Reset_N]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_BLK]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_CLK]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_HS]
set_property IOSTANDARD LVCMOS33 [get_ports VGA_VS]
set_property PACKAGE_PIN Y18 [get_ports Clk]
set_property PACKAGE_PIN B21 [get_ports Reset_N]
set_property PACKAGE_PIN N5 [get_ports VGA_BLK]
set_property PACKAGE_PIN P1 [get_ports VGA_CLK]
set_property PACKAGE_PIN P14 [get_ports VGA_VS]
set_property PACKAGE_PIN N13 [get_ports VGA_HS]
set_property PACKAGE_PIN T18 [get_ports {VGA_RGB[23]}]
set_property PACKAGE_PIN U18 [get_ports {VGA_RGB[22]}]
set_property PACKAGE_PIN N17 [get_ports {VGA_RGB[21]}]
set_property PACKAGE_PIN R18 [get_ports {VGA_RGB[20]}]
set_property PACKAGE_PIN P15 [get_ports {VGA_RGB[19]}]
set_property PACKAGE_PIN P16 [get_ports {VGA_RGB[18]}]
set_property PACKAGE_PIN N14 [get_ports {VGA_RGB[17]}]
set_property PACKAGE_PIN N15 [get_ports {VGA_RGB[16]}]
set_property PACKAGE_PIN L6  [get_ports {VGA_RGB[15]}]
set_property PACKAGE_PIN M5  [get_ports {VGA_RGB[14]}]
set_property PACKAGE_PIN J5  [get_ports {VGA_RGB[13]}]
set_property PACKAGE_PIN K6  [get_ports {VGA_RGB[12]}]
set_property PACKAGE_PIN R16 [get_ports {VGA_RGB[11]}]
set_property PACKAGE_PIN R14 [get_ports {VGA_RGB[10]}]
set_property PACKAGE_PIN P17 [get_ports {VGA_RGB[9]}]
set_property PACKAGE_PIN R17 [get_ports {VGA_RGB[8]}]
set_property PACKAGE_PIN R1  [get_ports {VGA_RGB[7]}]
set_property PACKAGE_PIN N3  [get_ports {VGA_RGB[6]}]
set_property PACKAGE_PIN P5  [get_ports {VGA_RGB[5]}]
set_property PACKAGE_PIN P4  [get_ports {VGA_RGB[4]}]
set_property PACKAGE_PIN P6  [get_ports {VGA_RGB[3]}]
set_property PACKAGE_PIN N4  [get_ports {VGA_RGB[2]}]
set_property PACKAGE_PIN M6  [get_ports {VGA_RGB[1]}]
set_property PACKAGE_PIN P2  [get_ports {VGA_RGB[0]}]