Lfsr32

最新推荐文章于 2024-03-18 10:31:49 发布

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最新推荐文章于 2024-03-18 10:31:49 发布

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分类专栏： verilog 文章标签： verilog

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See Lfsr5 for explanations.

Build a 32-bit Galois LFSR with taps at bit positions 32, 22, 2, and 1.

module top_module(
    input clk,
    input reset,    // Active-high synchronous reset to 32'h1
    output [31:0] q
); 
    reg [31:0] q_next;
    always @(posedge clk)
        begin
            if (reset)
                q <= 32'h1;
            else
                q <= q_next;
        end
    //assign q_next = q[31:1];
    //32,22,2,1处有tap
    //准备q_next
    //assign q_next[31] = q[0];
    //assign q_next[21] = q[22]^q[0];
    //assign q_next[1] = q[2] ^ q[0];
    //assign q_next[0] = q[1] ^ q[0];
    //上面的语句会报多进程的错误，这是应为assign同时赋值
    always @(*)
        begin
            q_next = q[31:1];
            q_next[31] = q[0];
    		q_next[21] = q[22]^q[0];
    		q_next[1] = q[2] ^ q[0];
   			q_next[0] = q[1] ^ q[0];
        end

endmodule