- //640x480
- //像素頻率為25M Hz. Xilinx的zedboard板子時鐘為100M Hz
- //逐行掃描
- //H_Back_Porch=40
- //H_Top_Border=8
- //H_Bottom_Border=8
- //H_Front_Porch=8
- //V_Back_Porch=25
- //V_Top_Border=8
- //V_Bottom_Border=8
- //V_Front_Porch=2
- //H_sync=96
- //V_sync=2
- module VGA(rst,clk,Hsync,Vsync,R,G,B);
- input rst,clk;
- output Hsync;
- output Vsync;
- output reg [3:0] R; //輸出Red
- output reg [3:0] G; //輸出Green
- output reg [3:0] B; //輸出Blue
- reg [9:0] H_cnt; //列計數器
- reg [9:0] V_cnt; //行計數器
- wire clk_25M; //頻率為25M Hz
- wire R0_active;
- wire G0_active;
- wire B0_active;
- wire R1_active;
- wire G1_active;
- wire B1_active;
- reg [2:0] div_cnt; //分頻計數器
- //===========================================================
- // 4分頻.頻率為25M Hz