USB 3.0 Rx Detect之超速U盘的识别

1 USB超速SerDes原理介绍
1.1 SerDes Rx.Detect
SerDes Rx.Detect的原理比较简单，就是通过一个逻辑电路比较RC时间常数的大小。
- 当Rx不存在时，RC时间常数较小。
- 当Rx存在时，RC时间常数较大。
下面将详细描述其原理。
Figure 1-1 USB 3.0电缆

USB 3.0的接口比USB 2.0接口多了5根线，这5根线分别是Shield、SSRX+/-和SSTX+/-，即是屏蔽地、超速发送差分对和接收差分对。因此一个支持USB 3.0的U盘插到电脑上我们有必要搞清楚是D+/D-传递数据还是SSRX+/-和SSTX+/-传递数据。
Figure 1-2 超速引脚

Figure 1-2中USB主机和设备通过电缆连接后，会在USB主机和设备端的Receiver SSRX+/-上产生一个等效下拉电阻R_Term（其范围在18-30欧姆，由SSRX+/-上各一个50欧姆的等效下拉电阻并联而成）。
Figure 1-3 等效下拉电阻R_Term

设备连接前的充放电时间常数T = R_Detect * C_Parasitic
设备连接后的充放电时间常数T = (R_Detect + R_Term) * (C_AC + C_Parasitic)
Probe SSTX+, you can see the 500mV Rx.Detect pulse without connecting device, its period is 13.75ms (72Hz), pulse width is less than 40us.

1.2 Redriver Rx.Detect
If Redriver detects receiver on its transmitter, then it assumes there is a valid termination. In this case, Redriver turns on its own Rx 50-ohm termination, this signals the xHCI to start Rx.Detect. Redriver does not include LTSSM, but Retimer includes LTSSM.

1.3 Electrical Idle
Electrical Idle means the differential voltage applied to the link is 0mV (no signaling). If there is 0mV differential, then the Rx cannot recover a clock and bit/symbol lock is lost.
In Logical Idle the Rx maintains bit/symbol lock because the Tx will send IDLE symbols. The IDLE symbols do not contain data and are thrown away by the Rx.

1.4 APL xHCI LTSSM stuck issue
not warm reset yet, waiting 200ms
not enabled, trying warm reset again

This log shows ss port stuck issue.
Disable USB3 roothub port: Clear power Feature and Set BH_Reset Feature.
In Hex format.
23 01 0008 port1 0000
23 03 001c port1 0000
Disable USB3 non roothub port: Set Rx.disabled Feature.
​​​​​​​In Hex format.
23 03 0005 0400|port1 0000
Add # define DEBUG at the first line of the hub.c file (above the header files) for enabling Linux dynamic debug log.

2 PIPE PHY数据线宽度
DWC_usb3_databook_2.50a.pdf
USB3 PIPE PHY的数据线宽度是可以设置的，最大宽度分别是Tx 32bit、Rx 32bit，需要根据PIPE PHY的接口频率来设置数据线宽度。如果PIPE PHY运行在128MHz，那么Tx和Rx的数据线宽度都是32bit；如果PIPE PHY运行在256MHz，那么Tx和Rx的数据线宽度都是16bit。

USB3 Gen1的速度5Gbps，是指Tx和Rx的速率都是5Gbps（128MHz x 4bytes或者256MHz x 2bytes）。
USB 3.0 Tx或者Rx的传输速率虽然是5Gbps，但实际上数字信号的方波频率是2.5GHz（传输2个bit对应一个方波）。

Intel APL (Gen9, A39X0) 8-port MPH xHCI的物理层名字是ModPHY（High Speed I/O Modular Physical Layer for Intel USB 3.0）。

3 xHCI PORTSC端口状态控制寄存器
drivers/usb/host/xhci-hub.c 
xhci_get_ports()

4 USB Bulk传输速度计算
- Full-speed
每个frame最大可以传输19个Bulk包，每个Bulk包最大是64 Bytes，所以其最大传输速率是：19 x 64 x 1000 = 1.16 MB/s。
- High-speed
USB 2.0在每个微帧中最大可传输13个Bulk包，每个Bulk包最大是512 Bytes，而每个微帧长固定为125 μs，所以其最大传输速率为：13 x 512 x 8 x 1000 = 51 MB/s。
- Super-speed
USB 3.0在每个微帧中最大可传输13个Bulk包，每个Bulk包最大是1024 Bytes，而每个微帧长固定为125 μs，所以其最大传输速率为：13 x 1024 x 8 x 1000 = 102 MB/s。

5 Standalone SerDes
Freescale MC92610
STM C65SPACE-HSSL SerDes, HSSL stands for High Speed Serial Link

6 Abbreviations
ARC：Argonant RISC Core
AT91SAM9260：SAM means Smart ARM-based Microcontroller
ATMEL SAMBA：ATMEL Smart ARM-based Microcontroller Boot Assistant
bdi：Linux backing device info
HUB3CV：USB 3 Hub Command Verifier Ver. 2.1.12.1
ISP1161：Philips' Integrated host Solution Pairs 1161，“Firms introduce USB host controllers”，https://www.eetimes.com/document.asp?doc_id=1290054
MPH：USB Multi-Port Host，Intel APL 8-port MPH xHCI的Port1作为OTG使用，和DWC3（仅作为slave）使用一个MUX开关来控制Host还是UDC连接到该Port1
SL811HS：Cypress/ScanLogic 811 Host/Slave，性能上与ISP1161（Integrated host Solution Pairs 1161）相当
SPH：USB Single-Port Host
TDI：TransDimension Inc.，该公司首先发明了将TT集成到EHCI RootHub中的方法，这样对于嵌入式系统来说，就省去了OHCI/UHCI的硬件，同时降低了成本，作为对该公司的纪念，Linux内核定义了宏ehci_is_TDI(ehci)；产品UHC124表示USB Host Controller；收购了ARC USB技术；现已被chipidea收购，chipidea又被mips收购
TT：Transaction Translator（事务转换器，将USB2.0的包转换成USB1.1的包）
TUR：Test Unit Ready，sd_spinup_disk()执行该命令，底层排队函数usb_stor_host_template.queuecommand()和ufshcd_queuecommand()
USB BH reset：Bigger Hammer or Brad Hosler，表示warm reset；you may be confused why the USB 3.0 spec calls the same type of reset "warm reset" in some places and "BH reset" in other places. "BH" reset is supposed to stand for "Big Hammer" reset, but it also stands for "Brad Hosler". Brad died shortly after the USB 3.0 bus specification was started, and they decided to name the reset after him. The suggestion was made shortly before the spec was finalized, so the wording is a bit inconsistent.
xECP：xHCI Extended Capabilities Pointer