vhdl_用bcd码实现八段数码管

library ieee;
use ieee.std_logic_1164.all;
entity bcd_8 is
port(bcd:in std_logic_vector(3 downto 0);
     out8:out std_logic_vector(7 downto 0));
end;
architecture a of bcd_8 is
begin
with bcd select
  out8<="11111100"when"0000",
        "01100000"when"0001",
        "11011010"when"0010",
        "11110010"when"0011",
        "01100110"when"0100",
        "10110110"when"0101",
        "10111110"when"0110",
        "11100000"when"0111",
        "11111110"when"1000",
        "11100110"when"1001",
        "11111111"when others; 
end;

library ieee;
use ieee.std_logic_1164.all;
entity bcd_8 is
port(bcd:in std_logic_vector(3 downto 0);
     out8:out std_logic_vector(7 downto 0));
end;
architecture a of bcd_8 is
begin
with bcd select
  out8<="11111100"when"0000",
        "01100000"when"0001",
        "11011010"when"0010",
        "11110010"when"0011",
        "01100110"when"0100",
        "10110110"when"0101",
        "10111110"when"0110",
        "11100000"when"0111",
        "11111110"when"1000",
        "11100110"when"1001",
        "11111111"when others; 
end;