library ieee;
use ieee.std_logic_1164.all;
entity vending_machine is
port(reset:in std_logic;
clock:in std_logic;
din:in std_logic_vector(1 downto 0);
dout:out std_logic_vector(1 downto 0));
end;
architecture a of vending_machine is
type state_type is(s0,s5,s10);
signal state:state_type;
begin
process(reset,clock)
begin
if reset='1' then
state<=s0;
elsif rising_edge (clock) then
case state is
when s0=>
if din="00" then
state<=s0;dout<="00";
elsif din="01" then
state<=s5;dout<="00";
elsif din="10" then
state<=s10;dout<="00";
end if;
when s5=>
if din="00" then
state<=s5;dout<="00";
elsif din="01" then
state<=s10;dout<="00";
elsif din="10" then
state<=s0;dout<="10";
end if;
when s10=>
if din="00" then
state<=s10;dout<="00";
elsif din="01" then
state<=s0;dout<="10";
elsif din="10" then
state<=s0;dout<="11";
end if;
end case;
end if;
end process;
end a;
library ieee;
use ieee.std_logic_1164.all;
entity vending_machine is
port(reset:in std_logic;
clock:in std_logic;
din:in std_logic_vector(1 downto 0);
dout:out std_logic_vector(1 downto 0));
end;
architecture a of vending_machine is
type state_type is(s0,s5,s10);
signal state:state_type;
begin
process(reset,clock)
begin
if reset='1' then
state<=s0;
elsif rising_edge (clock) then
case state is
when s0=>
if din="00" then
state<=s0;dout<="00";
elsif din="01" then
state<=s5;dout<="00";
elsif din="10" then
state<=s10;dout<="00";
end if;
when s5=>
if din="00" then
state<=s5;dout<="00";
elsif din="01" then
state<=s10;dout<="00";
elsif din="10" then
state<=s0;dout<="10";
end if;
when s10=>
if din="00" then
state<=s10;dout<="00";
elsif din="01" then
state<=s0;dout<="10";
elsif din="10" then
state<=s0;dout<="11";
end if;
end case;
end if;
end process;
end a;