Chapter 9 Models for Analog Design

Chapter 9 Models for Analog Design

这一章信息有点乱, 只能大致梳理总结一下, 因为不少知识Chapter 6已讲

Long-Channel MOSFETS 长沟道器件

对于长沟道器件在饱和区

$$I_D={\mu }_n{C}_{ox}\frac{W}{L}(V_{GS}-V_{THN}{)}^2[1+\lambda (V_{DS}-V_{DS,sat})]$$

gate override voltage, Vdsat
$$V_{DS,sat}=V_{GS}-V_{THN}=\text{gate overdrive voltage}$$

输出电阻:

$$r_o=\frac{1}{\lambda I_{D,sat}}$$

如果把MOS的gate和drain接到一起, 也称为diode-connected MOSFET, 管子永远处于饱和区

然后讲了一下casecode 的 current injection and stolen, 其实没啥意思, 就是MOSFET在饱和区约等于恒流源, 电流流入和流出会影响电压, 最终影响电流

The Threshold  Voltage

$$V_{th}=V_{thn0}+\gamma (\sqrt{\left|2V_{fp}\right|+V_{SB}}-\sqrt{\left|2V_{fp}\right|})$$

对于NMOS, Source = N, Body =P (通常是GND or Source ), 记住 VSB 增加, Vthn增加就行了, 这就是Body Effect.

对于PMOS, Source = P, Body =N (通常是VDD or Source), VBS 增加, Vthp增加, 这是Body Effect

所以这就是为什么对于low-Vth 的场景, 我们需要local tie, 也就是把Body和Source接到一起的原因, 为了降低threshold Voltage

The linear or triode region 在线性区

对于NMOS: Vgs>=Vthn, Vds<=Vgs-Vthn
$$I_D={\mu }_n{C}_{ox}\frac{W}{L}[(V_{GS}-V_{THN})V_{DS}-\frac{V_{DS}^2}{2}]$$

The Subthreshould region 亚阈值区

对于NMOS: Vgs<Vthn, MOS管像一个BJT, Ids电流随着Vgs指数变化, 但是没有BJT那样大, 所以gm没有BJT大, 但是比饱和区要大
$$I_D=I_{D0}\frac{W}{L}{e}^{\frac{(V_{GS}-V_{thn})}{nkT/q}}$$
kT/q=26mV at room temperature, n = 1 - 1.3

小信号模型

AC小信号就是在DC大信号上叠加的微小波动

Transconductance

$$i_d=g_m{v}_{gs}$$

$$g_m=\sqrt{2{\mu }_n{C}_{ox}\frac{W}{L}{I}_D}$$

$$\frac{g_m}{I_D}=\frac{2}{V_{dsat}}$$

The key point is that gm goes up as the root of drain current and linear with Vdsat

A diode connected MOST, its small-signal resistance is 1/gm (again, remember this)

MOS小信号模型

注意gmb的方向

$$i_d=g_{mb}{v}_{sb}$$

$$g_{mb}=g_m\eta$$

$\eta$ 代表threshold voltage changes with Vsb and ranges from 0 (no body effect ) to 0.5

Output resistance

$$r_o=\frac{1}{\lambda I_{D,sat}}$$

$$\lambda \propto \frac{1}{L}$$

因此
$$r_0\propto \frac{L^2}{V_{dsat}^2}$$
为了增大输出电阻, 用Long Channle 管子! 但是会减慢MOS管的速度

Transition Frequency  f_T

f_T 相当于单管的GBW
$$f_T=\frac{g_m}{2\pi C_{gs}}\propto \frac{V_{dsat}}{L^2}$$
这个式子也是fundementally important, to get the high speed, use minium channel length 即L, 和大的Vdsat

General Device Size for Analog Design

为了在Speed和Rout之间获得平衡, 一般取Vdsat=5% of VDD. For long channel MOS (VDD=5V), Vdsat =  250mV. For short channel MOS (VDD=1V), Vdsat = 50mV.

Long Channel Parameters List

Subthreshold gm and Vthn

在亚阈值区
$$g_m=\frac{I_D}{n{V}_T}$$
在亚阈值区gm随着电流增加而增加, 但是速度比较慢, 通常小于<MHz

在Vds固定情况下 As Id (Vgs) increase, the MOS 首先工作在亚阈值区 $g_m=I_D/n{V}_T$ (gm is exponentially depent on Vgs), to moderate inversion, and then to 饱和区强反型区 $g_m=\sqrt{2I_D{\beta }_n}={\beta }_n(V_{GS}-V_{THN})$ (gm is lnearly dependent on Vgs), 随着Vgs进一步增加, MOS进入线性区

Temperature Effect

Vthn随着温度增加而降低
$$\frac{dVth}{dT}=-0.6mV/C$$
mobility and KP也随着温度上升而降低, 也就是${\mu }_n$ 随着温度上升而下降

电流: At low Vgs, the changes in Vthn dominate and the drain current increases with increasing temperature. At higher Vgs, the mobility dominates and the drain current decreases with increasing temperature. When the effects cancel, the drain current doesn’t change with temperature,

Short-Channel MOSFETS 短沟道器件

General Design

gate override voltage 
$$V_{ovn}=V_{GS}-V_{thn}$$
晶体管速度: 
$$f_T=\frac{g_m}{2\pi C_{gs}}\propto \frac{V_{ov}}{L}$$
为了提升速度, 只能牺牲output swing (需要更大的Vdsat进入饱和区)

Velocity overshoot cause gm to increase with increase in Vgs or Vds

Output resistance

Vds越大, 输出电阻越大 (进入饱和区后Output resistance就基本固定了)

短沟道gm*ro is only 25, much lower than long channel

Short Channel Parameters List

Specific Design

$$g_m{r}_o\propto \frac{1}{\sqrt{I_D}}$$

$$g_m{r}_o=\frac{2}{\lambda (V_{GS}-V_{THN})}\propto \frac{L}{V_{ov}}$$

单管增益Gain 随着负载电流增大而变小, gain随着L的变大, 或者减小Vgs而变大

在弱反型区
$$g_m{r}_o=\frac{1}{n{V}_T\lambda }$$

MOSFET Noise Modeling

MOS噪声包括thermal和flicker noise两部分

在饱和区 电流噪声:
$$I_R^2(f)=\frac{8kT}{3}{g}_m$$
输入电压噪声 :
$$V_{in}^2(f)=\frac{8kT}{3g_m}$$
增大gm能减小输入thermal noise, flicker noise也能减小

The larger gm of NMOS makes it perferable device for low noise design.