LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY hamdec IS
PORT(hamin : IN BIT_VECTOR(0 TO 7); --d0 d1 d2 d3 p0 p1 p2 p4
dataout : OUT BIT_VECTOR(0 TO 3); --d0 d1 d2 d3
sec, ded, ne : OUT BIT); --diagnostic outputs
END hamdec;
ARCHITECTURE ver1 OF hamdec IS
BEGIN
PROCESS(hamin)
VARIABLE syndrome : BIT_VECTOR(3 DOWNTO 0);
BEGIN
--generate syndrome bits
syndrome(0) := (((((((hamin(0) XOR hamin(1)) XOR hamin(2)) XOR hamin(3))
XOR hamin(4)) XOR hamin(5)) XOR hamin(6)) XOR hamin(7));
syndrome(1) := (((hamin(0) XOR hamin(1)) XOR hamin(3)) XOR hamin(5));
syndrome(2) := (((hamin(0) XOR hamin(2)) XOR hamin(3)) XOR hamin(6));
syndrome(3) := (((hamin(1) XOR hamin(2)) XOR hamin(3)) XOR hamin(7));
IF (syndrome = "0000") THEN --no errors
ne <= '1';
ded <= '0';
sec <= '0';
dataout(0 TO 3) <= hamin(0 TO 3);
ELSIF (syndrome(0) = '1') THEN --single bit error
ne <= '0';
ded <= '0';
sec <= '1';
CASE syndrome(3 DOWNTO 1) IS
WHEN "000"|"001"|"010"|"100" =>
dataout(0 TO 3) <= hamin(0 TO 3); -- parity errors
WHEN "011" => dataout(0) <= NOT hamin(0);
dataout(1 TO 3) <= hamin(1 TO 3);
WHEN "101" => dataout(1) <= NOT hamin(1);
dataout(0) <= hamin(0);
dataout(2 TO 3) <= hamin(2 TO 3);
WHEN "110" => dataout(2) <= NOT hamin(2);
dataout(3) <= hamin(3);
dataout(0 TO 1) <= hamin(0 TO 1);
WHEN "111" => dataout(3) <= NOT hamin(3);
dataout(0 TO 2) <= hamin(0 TO 2);
END CASE;
--double error
ELSIF (syndrome(0) = '0') AND (syndrome(3 DOWNTO 1) /= "000") THEN
ne <= '0';
ded <= '1';
sec <= '0';
dataout(0 TO 3) <= "0000";
END IF;
END PROCESS;
END ver1;