rk3588 v4l2架构梳理

autho

已于 2024-01-25 19:11:33 修改

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分类专栏： Linux driver 资料文章标签： arm linux 嵌入式硬件

于 2022-09-30 16:20:38 首次发布

本文链接：https://blog.csdn.net/MATLABCSD/article/details/127120405

版权

本文详细解析了在RK3588平台上V4L2异步注册过程，包括A部分的v4l2_async_notifier_parse_fwnode_endpoints_by_port函数，B部分的v4l2_async_subdev_notifier_register，以及C部分的v4l2_async_register_subdev。通过分析注册顺序和链表操作，阐述了如何匹配和管理subdev及asd节点。

摘要由CSDN通过智能技术生成

本篇文章仅为防止忘记v4l2 异步注册写的，个人觉的写的不够详细，仅供参考，

dts如下


// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
 *
 */

/ {
	cam_ircut0: cam_ircut {
		status = "okay";
		compatible = "rockchip,ircut";
		ircut-open-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
		ircut-close-gpios  = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
	};

};

&csi2_dcphy0 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipidphy0_in_ucam0: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&ov13855_out0>;
				data-lanes = <1 2 3 4>;
			};
		};
		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			csidcphy0_out: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&mipi0_csi2_input>;
			};
		};
	};
};

&csi2_dphy0_hw {
	status = "okay";
};

&i2c4 {
	status = "okay";
	pinctrl-0 = <&i2c4m0_xfer>;
	
	dw9763: dw9763@c {
		compatible = "dongwoon,dw9763";
		status = "okay";
		reg = <0xc>;
		rockchip,camera-module-index = <0>;
		rockchip,vcm-start-current = <10>;
		rockchip,vcm-rated-current = <85>;
		//rockchip,vcm-step-mode = <5>;
		rockchip,camera-module-facing = "back";
		vdd-gpio = <&aw_gpio1 0 GPIO_ACTIVE_HIGH>;
		};


	ov13855: ov13855@10 {
		compatible = "ovti,ov13855";
		status = "okay";
		reg = <0x10>;
		clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
		clock-names = "xvclk";
		pinctrl-names = "default";
		pinctrl-0 = <&mipim0_camera1_clk>;
		power-domains = <&power RK3588_PD_VI>;
		reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
		pwdn-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
		//lf-gpios = <&aw_gpio1 0 GPIO_ACTIVE_HIGH>;
		//iovdd-gpios = <&aw_gpio1 1 GPIO_ACTIVE_HIGH>;
		vaf-gpios = <&aw_gpio1 2 GPIO_ACTIVE_HIGH>;
		avdd-gpios = <&aw_gpio1 3 GPIO_ACTIVE_HIGH>;
		dvdd-gpios = <&aw_gpio1 4 GPIO_ACTIVE_HIGH>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
		rockchip,camera-module-name = "CMK-OT2016-FV1";
		rockchip,camera-module-lens-name = "default";
		lens-focus = <&dw9763>;
		port {
			ov13855_out0: endpoint {
				remote-endpoint = <&mipidphy0_in_ucam0>;
				data-lanes = <1 2 3 4>;
			};
		};
	};
};

&mipi0_csi2 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi0_csi2_input: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&csidcphy0_out>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi0_csi2_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&cif_mipi_in0>;
			};
		};
	};
};

&pinctrl {
	cam {
	/*
		mipidphy0_pwr: mipidphy0-pwr {
			rockchip,pins =
				<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	*/
	};
};

&rkcif {
	status = "okay";
};

&rkcif_mipi_lvds {
	status = "okay";

	port {
		cif_mipi_in0: endpoint {
			remote-endpoint = <&mipi0_csi2_output>;
		};
	};
};

&rkcif_mipi_lvds_sditf {
	status = "okay";

	port {
		mipi_lvds_sditf: endpoint {
			remote-endpoint = <&isp0_vir0>;
		};
	};
};

&rkcif_mmu {
	status = "okay";
};

&rkisp0 {
	status = "okay";
};

&isp0_mmu {
	status = "okay";
};

&rkisp0_vir0 {
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		isp0_vir0: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&mipi_lvds_sditf>;
		};
	};
};

kernel-5.10/driver/p