1、初始错误代码:
(1)一位全加器模块:
module FA(A,B,sum,ci,co);
input A,B,ci;
output sum;
output co;
reg sum;
reg co;
//这个地方就不对,ci变化时,也应实现相加,而且sum和co都不能定义成reg寄存器类型;
always @(A,B)
{co,sum}=A+B+ci;
endmodule
(2)、引用模块(1),四位全加器:
`include "FA.v"
module add(A,B,co,sum);
input [3:0]A,B;
output [3:0]sum,co;
FA f0(A[0],B[0],sum[0],0,co[0]);
FA f1(A[1],B[1],sum[1],co[0],co[1]);
FA f2(A[2],B[2],sum[2],co[1],co[2]);
FA f3(A[3],B[3],sum[3],co[2],co[3]);
endmodule
(3)、testbench代码:
`include "add.v"
module add_test;
reg [3:0]A,B;
wire[3:0]Sum,Co;
add ad(A,B,Co,Sum);
initial
fork
A=4'b0000;
B=4'b0001;
#30 A=4'b0010;
#30 B=4'b