GD32 SPI DMA

C嵌入式

已于 2022-02-11 17:48:00 修改

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文章标签：单片机 stm32 嵌入式硬件 c++

于 2022-02-11 17:46:58 首次发布

本文链接：https://blog.csdn.net/cuuitsj/article/details/122885751

版权

MasterSPI_F450.cpp

#include "MasterSPI_F450.hpp"
#include "main.h"


void MasterSPI_F450::Init(void)
{
	/* peripheral clock enable */
	rcu_periph_clock_enable(RCU_GPIOA);
	rcu_periph_clock_enable(RCU_DMA1);
	rcu_periph_clock_enable(RCU_SPI0);
	/* GPIO config */
	/* SPI0 GPIO config */
	/* SPI0_CLK(PA5), SPI0_MISO(PA7) */
	gpio_af_set(GPIOA, GPIO_AF_5, GPIO_PIN_5|GPIO_PIN_7);
	gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_5|GPIO_PIN_7);
	gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_5|GPIO_PIN_7);

	dma_single_data_parameter_struct dma_init_struct;
	/* DMA config */
	dma_deinit(DMA1,DMA_CH3);
	dma_init_struct.periph_addr         = (uint32_t)&SPI_DATA(SPI0);
	dma_init_struct.memory0_addr        = (uint32_t)0;
	dma_init_struct.direction           = DMA_MEMORY_TO_PERIPH;
	dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
	dma_init_struct.priority            = DMA_PRIORITY_LOW;
	dma_init_struct.number              = 0;
	dma_init_struct.periph_inc          = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.memory_inc          = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.circular_mode       = DMA_CIRCULAR_MODE_DISABLE;
	dma_single_data_mode_init(DMA1,DMA_CH3,&dma_init_struct);
	dma_channel_subperipheral_select(DMA1,DMA_CH3,DMA_SUBPERI3);

	/* SPI config */
	spi_parameter_struct spi_init_struct;

	/* SPI1 parameter config */
	spi_init_struct.trans_mode           = SPI_TRANSMODE_FULLDUPLEX;
	spi_init_struct.device_mode          = SPI_MASTER;
	spi_init_struct.frame_size           = SPI_FRAMESIZE_8BIT;
	spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
	spi_init_struct.nss                  = SPI_NSS_SOFT;
	spi_init_struct.prescale             = SPI_PSC_32;
	spi_init_struct.endian               = SPI_ENDIAN_MSB;
	spi_init(SPI0, &spi_init_struct);

	spi_crc_polynomial_set(SPI0, 10);
	
	/* SPI enable */
	spi_enable(SPI0);

	/* DMA channel enable */
		dma_channel_enable(DMA1,DMA_CH3);

	/* SPI DMA enable */
	spi_dma_enable(SPI0, SPI_DMA_TRANSMIT);
//	while(!dma_flag_get(DMA1,DMA_CH3,DMA_FLAG_FTF));
}
void MasterSPI_F450::Write(uint8_t *buf, uint16_t len)
{
	dma_single_data_parameter_struct dma_init_struct;
	/* DMA config */
	dma_deinit(DMA1,DMA_CH3);
	dma_init_struct.periph_addr         = (uint32_t)&SPI_DATA(SPI0);
	dma_init_struct.memory0_addr        = (uint32_t)buf;
	dma_init_struct.direction           = DMA_MEMORY_TO_PERIPH;
	dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
	dma_init_struct.priority            = DMA_PRIORITY_LOW;
	dma_init_struct.number              = len;
	dma_init_struct.periph_inc          = DMA_PERIPH_INCREASE_DISABLE;
	dma_init_struct.memory_inc          = DMA_MEMORY_INCREASE_ENABLE;
	dma_init_struct.circular_mode       = DMA_CIRCULAR_MODE_DISABLE;
	dma_single_data_mode_init(DMA1,DMA_CH3,&dma_init_struct);
	dma_channel_subperipheral_select(DMA1,DMA_CH3,DMA_SUBPERI3);

	/* DMA channel enable */
	dma_channel_enable(DMA1,DMA_CH3);
	while(!dma_flag_get(DMA1,DMA_CH3,DMA_FLAG_FTF));

}

void MasterSPI_F450::Read(uint8_t *buf, uint16_t *len)
{
}

MasterSPI_F450.hpp

#pragma once

#include <stdint.h>
#include "bsp/bsp.hpp"

class MasterSPI_F450 : public MasterSPI
{
public:
    MasterSPI_F450() {}
    void Init(void);
    void Write(uint8_t *buf, uint16_t len);
    void Read(uint8_t *buf, uint16_t *len);
};

MasterSPI

#pragma once

#include <stdint.h>

class MasterSPI
{
    public:
    MasterSPI(){}
    virtual void Init(void){}
    virtual void Write(uint8_t *buf, uint16_t len){}
    virtual void Read(uint8_t *buf, uint16_t *len){}
};

中断函数

/*!
    \file  gd32f4xx_it.c
    \brief interrupt service routines

    \version 2016-08-15, V1.0.0, demo for GD32F4xx
    \version 2018-12-12, V2.0.0, demo for GD32F4xx
*/

/*
    Copyright (c) 2018, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification, 
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this 
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice, 
       this list of conditions and the following disclaimer in the documentation 
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors 
       may be used to endorse or promote products derived from this software without 
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
OF SUCH DAMAGE.
*/

#include "gd32f4xx_it.h"
#include "systick.h"
#include "gd32f4xx_usart.h"

/*!
    \brief      this function handles DMA1_Channel7_IRQHandler interrupt
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA1_Channel7_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1, DMA_CH7, DMA_INT_FLAG_FTF)){
        dma_interrupt_flag_clear(DMA1, DMA_CH7, DMA_INT_FLAG_FTF);
//        g_transfer_complete = SET;
    }
}

/*!
    \brief      this function handles DMA0_Channel4_IRQHandler interrupt
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA1_Channel2_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA1, DMA_CH2, DMA_INT_FLAG_FTF)){
        dma_interrupt_flag_clear(DMA1, DMA_CH2, DMA_INT_FLAG_FTF);
//        g_transfer_complete = SET;
    }
}

void DMA0_Channel5_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA0, DMA_CH5, DMA_INT_FLAG_FTF)){
        dma_interrupt_flag_clear(DMA0, DMA_CH5, DMA_INT_FLAG_FTF);
//        g_transfer_complete = SET;
    }
}

/*!
    \brief      this function handles DMA0_Channel4_IRQHandler interrupt
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA0_Channel6_IRQHandler(void)
{
    if(dma_interrupt_flag_get(DMA0, DMA_CH6, DMA_INT_FLAG_FTF)){
        dma_interrupt_flag_clear(DMA0, DMA_CH6, DMA_INT_FLAG_FTF);
//        g_transfer_complete = SET;
    }
}

void USART0_IRQHandler(void)
{
	if((RESET != usart_interrupt_flag_get(USART0, USART_INT_FLAG_IDLE)) && (RESET != usart_flag_get(USART0, USART_FLAG_IDLE)))
	{
		usart_data_receive(USART0);  //清楚标志位
		usart_interrupt_flag_clear(USART0,USART_INT_FLAG_IDLE);//清空闲中断标志
//		usart_data_transmit(USART0, 128 - dma_transfer_number_get(DMA1, DMA_CH2));
//		 
//		while(RESET == usart_flag_get(USART0, USART_FLAG_TBE));
	}
}

void USART1_IRQHandler(void)
{
	if((RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_IDLE)) && (RESET != usart_flag_get(USART1, USART_FLAG_IDLE)))
	{
		usart_data_receive(USART1);  //清楚标志位
		usart_interrupt_flag_clear(USART1,USART_INT_FLAG_IDLE);//清空闲中断标志
//		usart_data_transmit(USART0, 128 - dma_transfer_number_get(DMA1, DMA_CH2));
//		 
//		while(RESET == usart_flag_get(USART0, USART_FLAG_TBE));
	}
}


/*!
    \brief      this function handles NMI exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void NMI_Handler(void)
{
}

/*!
    \brief      this function handles HardFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
//void HardFault_Handler(void)
//{
//    /* if Hard Fault exception occurs, go to infinite loop */
//    while (1){
//    }
//}

/*!
    \brief      this function handles MemManage exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void MemManage_Handler(void)
{
    /* if Memory Manage exception occurs, go to infinite loop */
    while (1){
    }
}

/*!
    \brief      this function handles BusFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void BusFault_Handler(void)
{
    /* if Bus Fault exception occurs, go to infinite loop */
    while (1){
    }
}

/*!
    \brief      this function handles UsageFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void UsageFault_Handler(void)
{
    /* if Usage Fault exception occurs, go to infinite loop */
    while (1){
    }
}

/*!
    \brief      this function handles SVC exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void SVC_Handler(void)
{
}

/*!
    \brief      this function handles DebugMon exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DebugMon_Handler(void)
{
}

/*!
    \brief      this function handles PendSV exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
//void PendSV_Handler(void)
//{
//}

/*!
    \brief      this function handles SysTick exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
//void SysTick_Handler(void)
//{
//    delay_decrement();
//		rt_os_tick_callback();
//}