读赛灵思IP手册,block memory generator Product Guide,即内存memory系列(如RAM ROM等)的手册。本期介绍Chapter2的第一部分Performance性能。
P27 chapter 2
Product Specification
This chapter includes details on performance and latency
产品规格
本章包括有关性能和延迟的详细信息
Performance
Performance and resource utilization for a Block Memory Generator core (BMG) varies depending on the configuration and features selected during core customization.
Note: Performance for UltraScale™ devices is expected to be similar to results from 7 series devices.
性能
block memory generator IP核(BMG)的性能和资源利用率取决于IP核定制期间选择的配置和功能。
注意:UltraScale器件的性能™预计与7系列器件的结果类似。
Resource Utilization
For details about Resource Utilization, visit Performance and Resources Utilization web page.
Latency
The latency of output signals of BMG varies for different configurations. See Optional Output Registers, Optional Pipeline Stages, and Memory Output Flow Control in Chapter 3 for more details.
资源利用率
有关资源利用率的详细信息,请访问性能和资源利用率网页。
延迟
BMG的输出信号的延迟因不同的配置而不同。有关详细信息,请参阅第3章中的可选输出寄存器、可选管道级和内存输出流控制。