module add(
input [3:0] a,
input [3:0] b,
input cin,
output [3:0] c,
output cout
);
assign {cout,c} = a+b+cin;
endmodule
对应的testbench是
`timescale 1ns/1ns
module add_tb ;
reg [3:0] a ;
reg cin ;
reg [3:0] b ;
wire cout ;
wire [3:0] c ;
initial
begin
a =4'd11;
b =4'd4;
cin = 1;
end
add
DUT (
.a (a ) ,
.cin (cin ) ,
.b (b ) ,
.cout (cout ) ,
.c (c ) );
endmodule
如果都是1位还可以这么写
assign c = a^b^cin;
assign cout =(a&&b)||(b&&cin)||(cin&&a);