4.1 Introduction & 4.2.0 Logical Sub-block总结汇报

• logical sub-block：

  • Transmit section：prepares outgoing information passed from the Data Link Layer for transmission by the electrical sub-block
  • Receiver section：t identifies and prepares received information before passing it to the Data Link Layer

• logical sub-block and electrical sub-block coordinate：state of each Transceiver through a status and control register interface or functional equivalent

  • directs control and management functions of the Physical Layer

• three types of encoding：

  • 8b/10b
  • 128b/130b
  • 1b/1b
  • determined by the Data Rate of the Link

• two Data Stream modes：

  • Non-Flit Mode: a contiguous collection of TLPs, DLLPs, and Logical Idle/IDL Token, starting at the end of an Ordered Set and ending with another Ordered Set or a Link Electrical Idle
  • Flit Mode: a set of Flits, starting at the end of the first SKP Ordered Set after an SDS Ordered Set, and ending with the last Flit prior to an Ordered Set other than SKP Ordered Set that causes the Link to exit out of L0 state or if the Link enters Electrical Idle
  • determined during initial Link training: If not disabled and if both the Ports (and all Pseudo-Ports, if any) support it, Flit Mode is chosen. Otherwise, Non-Flit Mode is chosen.

• encoding type is independent to Data Stream mode

• Flit Mode identification:

  • Flit Mode Supported bit
    • Bit 0 of the Data Rate Identifier Symbol of 8b/10b and 128b/130b encoded TS1s and TS2s.
    • This bit is Set when the Flit Mode Supported bit in the PCI Express Capabilities Register is Set and the Flit Mode Disable bit in the Link Control Register is Clear.
  • Flit_Mode_Enabled
    • Variable that indicates whether or not Flit Mode has been sucesfully negotiated.
  • Flit Mode Supported
    • Field in the PCI Express Capabilities Register.
    • Flit Mode is supported when this bit is Set
  • Flit Mode Disable
    • Field in the Link Control Register.
    • This bit used to disable Flit Mode.
    • This bit is most useful in Downstream Ports but is also defined for Upstream Ports (useful for crosslinks or by device firmware).
    • Setting this bit may be useful to workaround faulty hardware.
  • Flit Mode Status
    • Field in the Link Status 2 Register.
    • Indicates that that the Link is or will be operating in Flit Mode.
    • Should match the Flit_Mode_Enabled variable.