module spt_core(
input clk_100m ,
input rst_spt_n ,
output reg spt_cpuif_head_err ,
output reg spt_cpuif_tail_err ,
output reg spt_cpuif_short_pkt,
output reg spt_cpuif_long_pkt ,
output reg spt_cpuif_ok_pkt ,
input vid_in,
input [15:0] data_in,
output reg vid_out,
output [15:0] data_out,
output ram_w_en,
output [15:0] ram_w_data,
output [10:0] ram_w_addr,
output ram_r_en,
input [15:0] ram_r_data,
output [10:0] ram_r_addr
);
// --------------------------------------------------------------------
// signal declare
// --------------------------------------------------------------------
reg vid_in_ff1, vid_in_ff2, vid_in_ff3, vid_in_ff4, vid_in_ff5;
reg [15:0]data_in_ff1, data_in_ff2, data_in_ff3, data_in_ff4, data_in_ff5;
wire vid_data_head_en;
wire data_head_err, data_tail_err, data_lng_err, data_sht_err;
re
【IC萌新虚拟项目】spt_core RTL代码与spt代码
于 2023-06-03 22:32:35 首次发布