牛客刷题＜12＞四位超前进位加法器

题目：4bit超前进位加法器电路_牛客题霸_牛客网

 半加器

半加器是最简单的加法器。它不考虑进位输入。其中A和B是两个加数，S是和，C_o是进位输出

assign S     = A ^ B;
assign C_out = A & B;

超前进位加法器：【HDL系列】超前进位加法器原理与设计 - 知乎 

解法一：

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);
    wire [3:0] G,P,C;
    assign P=A_in^B_in;
    assign G=A_in&B_in;
    
    assign C={G[3]|(P[3]&C[2]), G[2]|(P[2]&C[1]), G[1]|(P[1]&C[0]), G[0]|(P[0]&C_1)};
    assign S={P[3]^C[2], P[2]^C[1], P[1]^C[0], P[0]^C_1};
    assign CO=C[3];
    
endmodule

解法二：

`timescale 1ns/1ns

module lca_4( 
input [3:0] A_in , 
input [3:0] B_in , 
input C_1 ,
output   wire           CO    ,
output   wire [3:0]     S
);

assign {CO,S} = A_in+B_in+C_1;
endmodule

解法三

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);
    reg [3:0] g;
    reg [3:0] c;
    reg [3:0] p;
    reg [3:0] s;
    integer i;
    always  @(*)begin
        for(i=0;i<4;i=i+1)begin
            g[i] = A_in[i] & B_in[i];
            p[i] = A_in[i] ^ B_in[i];
            c[i] = i>0 ? (g[i]|p[i]&c[i-1]) : (g[i]|C_1&p[i]);
            s[i] = i>0 ? (p[i]^c[i-1]) : (p[i]^C_1);
         end
    end
    assign S = s;
    assign CO = c[3];
endmodule

解法四

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);
    wire [2:0]CO_temp;
    
    lca_1 lca_1_U1(
        .A_in(A_in[0]),
        .B_in(B_in[0]),
        .C_in(C_1),
        .CO(CO_temp[0]),
        .S(S[0])
    );
    
    lca_1 lca_1_U2(
        .A_in(A_in[1]),
        .B_in(B_in[1]),
        .C_in(CO_temp[0]),
        .CO(CO_temp[1]),
        .S(S[1])
    );
    
    lca_1 lca_1_U3(
        .A_in(A_in[2]),
        .B_in(B_in[2]),
        .C_in(CO_temp[1]),
        .CO(CO_temp[2]),
        .S(S[2])
    );
    
    lca_1 lca_1_U4(
        .A_in(A_in[3]),
        .B_in(B_in[3]),
        .C_in(CO_temp[2]),
        .CO(CO),
        .S(S[3])
    );
    
endmodule

module lca_1(
    input             A_in,
    input             B_in,
    input             C_in,
    
    output            CO,
    output            S
);
    wire G;
    wire P;
    
    assign G = A_in & B_in;
    assign P = A_in ^ B_in;
    
    assign S = P ^ C_in;
    assign CO = G | (P & C_in);
    
endmodule