tiny4412 基础（四）时钟体系

时钟体系是后面裸板，u-boot等的基础，这里先简单总结一下

 

各个模块典型值：

晶振输入：

XXTI 和  XusbXTI， 对于tiny4412，在XusbXTI上接了24MHz晶振，通过PLL后可以产生1.4GHz的频率。

PLL由如下几种：

PLL分类

No.	PLL	Notes
1	APLL	APLL mainly drives the CPU_BLK clocks. It generates frequencies up to 1.4 GHz with a duty ratio of 49:51. APLL also generates DMC_BLK, LEFTBUS_BLK, RIGHTBUS_BLK, and CMU_TOP clocks as supplement of MPLL
2	MPLL	MPLL mainly drives the DMC_BLK, LEFTBUS_BLK, RIGHTBUS_BLK, and CMU_TOP clocks. It generates frequencies up to 1 GHz with a duty ratio of 49:51. MPLL also generates CPU_BLK clocks when it blocks APLL for locking during the Dynamic Voltage Frequency Scaling (DVFS)
4	EPLL	EPLL mainly generates an audio clock.
5	VPLL	VPLL mainly generates video system operating clock of 54 MHz, or a G3D clock, or 440 MHz clock at 1.1 V.

可知对于CPU来说主要是APLL。

再看MPLL

 

 

现在以串口0为列，分析一下时钟体系：

那上面可知对于UART0，主要由两个因素， DIVuart0 和 MUXuart0

 

对于DIV，主要参考CLK_DIV_PERIL0寄存器，Base Address: 0x1003_0000， offset = 0xC550

UART0_RATIO

[3:0]

RW

DIVUART0 Clock Divider Ratio SCLK_UART0 = MOUTUART0/(UART0_RATIO + 1)

其默认值是0， 及不分频
对于MUX， 查看CLK_SRC_PERIL0寄存器， Base Address: 0x1003_0000， offset = 0xC250
 

UART0_SEL

[3:0]

RW

Controls MUXUART0 0000 = XXTI 0001 = XusbXTI 0010 = SCLK_HDMI24M 0011 = SCLK_USBPHY0 0101 = SCLK_HDMIPHY 0110 = SCLKMPLL_USER_T 0111 = SCLKEPLL 1000 = SCLKVPLL Others = Reserved MUXUART0 is the source clock of UART0.

其默认值是0x1， 即 XusbXTI， 24M

根据UART

1. UART Baud-Rate Configuration
You can use the value stored in the Baud-rate divisor (UBRDIVn) and divisor fractional value (UFRACVALn)
to determine the serial Tx/Rx clock rate (Baud rate) as:
DIV_VAL = UBRDIVn + UFRACVALn/16
or
DIV_VAL = (SCLK_UART/(bps  16))  1
Where, the divisor should be from 1 to (216 – 1).
By using UFRACVALn, you can generate the Baud rate more accurately.
For example, if the Baud rate is 115200 bps and SCLK_UART is 40 MHz, UBRDIVn and UFRACVALn are:
DIV_VAL = (40000000/(115200  16)) – 1
= 21.7 – 1
= 20.7
UBRDIVn = 20 (integer part of DIV_VAL)
UFRACVALn/16 = 0.7
Therefore, UFRACVALn = 11

DIV_VAL = 24000000 / （115200*16） - 1 = 12.02

UBRDIVn = 12

UFRACVALn/16 = 0.02, UFRACVALn = 0.32

（待续）