电路Circuit->Chapter6 Capacitors and Inductors

本文详细介绍了电容和电感作为储能元件的工作原理。电容由两个导电板和绝缘体组成,其电容值取决于板上的电荷和两板间的电压差。电感则由导电线圈构成,电压依赖于电流的变化率。文章还讨论了串联和并联电容及电感的等效值计算,并阐述了它们在电路中的应用,如积分器和微分器。

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6.1 Storage Elements

In contrast to resistors,which spend or dissipate energy irreversibly,capacitors and inductors do not dissipate but stores or releases energy,which can be retrieved at a later time(i.e.,have a memory).
For this reason,capacitors and inductors are called storge elements.

6.2 Capacitors

A capacitor consists of two conducting plates separated by an insulator(or dielectric).
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这几个例子不重要,看不懂也不用查字典
Fixed capacitors:polyester capacitor;ceramic capacitor;electrolytic capacitor
Variable capacitors:trimmer capacitor;filmtrim capacitor

Capacitance is the ratio of the charge on one plate of a capacitor to the voltage difference between the two plates,measured in farads(F)
C = q U C=\frac{q}{U} C=Uq
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Circuit model of a nonideal capacitor(实际电容模型)
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Important properties of a capacitor:

  1. A capacitor is an open circuit to dc通直阻交
  2. The voltage on a capacitor must be continuous.The voltage on a capacitor cannot change abruptly. The capacitor resists an abrupt change in the voltage across it.电压不能突变
  3. The ideal capacitor does not dissipate energy.It takes power from the circuit when storing energy in its field and returns previously stored energy when delivering power to the circuit.不消耗能量
  4. A real,nonideal capacitor has a parallel-model leakage resistance.The leakage resistance can be neglected for most practical applications.

6.3 Series and Parallel Capacitors

The series-parallel combination of resistive circuits can be extened to series -parallel connecs of capacitors.
How to replace capacitors in series-parallel connections by a single equivalent capacitor?
v-i characteristics
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The equivalent capacitance of parallel-connected capacitors is the sum of the individual capacitances.
C e q = C 1 + C 2 + ⋯ + C N C_{eq}=C_1+C_2+\cdots+C_N Ceq=C1+C2++CN
The equivalent capacitance of series-connected capacitors is the reciprocal of the sum of the reciprocals of the individual capacitances.
1 C e q = 1 C 1 + 1 C 2 + ⋯ + 1 C N \frac{1}{C_{eq}}=\frac{1}{C_1}+\frac{1}{C_2}+\cdots+\frac{1}{C_N} Ceq1=C11+C21++CN1

6.4 Inductors

An Inductor consists of a coil of conducting wire.
A practical inductor is usually formed into a cylindrical coil with many turns of conducting wire.
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real inductors:solenoidal wound inductor;toroidal inductor;chip inductor

1.v-i characteristics

u ( t ) = L d i ( t ) d t u(t)=L\frac{di(t)}{dt} u(t)=Ldtdi(t)
Note:

  1. Inductance is the property whereby an inductor exhibits opposition to the change of current flowing through it.
  2. The voltage across an inductor depends on the time rate of change of the current.
  3. When the current is constant,u=0.An inductor acts like a short circuit to dc.
  4. The current through an inductor cannot change instantaneously.
    i ( t ) = 1 L ∫ − ∞ t u d ξ = 1 L ∫ − ∞ t 0 u d ξ + 1 L ∫ t 0 t u d ξ   i ( t ) = i ( t 0 ) + 1 L ∫ t 0 t u d ξ . i(t)=\frac{1}{L}∫_{-∞}^t udξ=\frac{1}{L}∫_{-∞}^{t_0} udξ+\frac{1}{L}∫_{t_0}^t udξ\\ ~\\ i(t)=i(t_0)+\frac{1}{L}∫_{t_0}^t udξ . i(t)=L1tudξ=L1t0udξ+L1t
### STM32F103C8T6 SW电路设计 对于STM32F103C8T6单片机而言,SW(Serial Wire)调试接口的设计至关重要。该接口用于通过JTAG或SWD协议实现程序下载和在线调试等功能。 #### SW电路设计要点 1. **SWDIO 和 SWCLK 引脚配置** - SWDIO (Serial Wire Data I/O) 和 SWCLK (Serial Wire Clock) 是两个主要引脚,分别负责数据传输与时钟同步。 - 这些引脚应尽可能短而直地连接到外部调试器,减少信号干扰[^1]。 2. **上拉电阻设置** - 对于SWDIO引脚,在某些情况下可能需要添加一个弱上拉电阻(一般为4.7kΩ),以确保在无活动状态下保持高电平状态。 3. **去耦电容布置** - 靠近VDDA、VDD以及VBAT电源引脚处放置适当容量的陶瓷电容器(如100nF),有助于滤除高频噪声并维持电压稳定性[^3]. 4. **PCB布局建议** - 尽量缩短SWD线路长度,并远离大电流路径和其他潜在噪音源;同时注意接地平面的良好分布,增强抗扰能力。 5. **保护措施** - 可考虑加入ESD静电防护二极管来提高系统的鲁棒性和可靠性。 ```plaintext +--+ | | | STM32F103C8T6 |-----> VBAT -> 3.3V Power Supply | |---> GND -> Ground Plane | SWCLK |---> Connect to Debugger's TCK/SWCLK Pin | SWDIO |---> Connect to Debugger's TDI/TMS/SWDIO Pin with optional pull-up resistor | |---> Add decoupling capacitors near power pins +-------------------+ ``` 此简易示意图展示了如何将STM32F103C8T6与编程/调试工具相连的关键要素。实际应用中还需参照具体项目需求调整参数及组件选型。
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