信号差分对的优势说明

1） external electromagnetic interference tends to affect both conductors identically

2）consider a single-ended digital system with supply voltage {\displaystyle V_{S}}. The high logic level is {\displaystyle V_{S}\,} and the low logic level is 0 V. The difference between the two levels is therefore {\displaystyle V_{S}-0\,\mathrm {V} =V_{S}}. Now consider a differential system with the same supply voltage. The voltage difference in the high state, where one wire is at {\displaystyle V_{S}\,} and the other at 0 V, is {\displaystyle V_{S}-0\,\mathrm {V} =V_{S}}. The voltage difference in the low state, where the voltages on the wires are exchanged, is {\displaystyle 0\,\mathrm {V} -V_{S}=-V_{S}}. The difference between high and low logic levels is therefore {\displaystyle V_{S}-(-V_{S})=2V_{S}\,}. This is twice the difference of the single-ended system. If the voltage noise on one wire is uncorrelated to the noise on the other one, it takes twice as much noise to cause an error with the differential system as with the single-ended system. In other words, differential signalling doubles the noise immunity

总结：差分对的好处在于干扰对于差分对中的两根信号的影响通常是相同的（原因是pcb走线要求两者紧挨着走线，环境基本相同）。设差分对信号分别为A和B，A和B极性相反，比如：当A为高电平时，受到干扰，信号有一个上冲，则B也同样有一个上冲，两者相减则相对差值保持不变，信号相对值较为稳定。

参考：https://en.wikipedia.org/wiki/Differential_signaling