内存屏障sy/ld/st的详细解释

在arch/arm64/include/asm/barrier.h 中定义了一些内存屏障
#define mb()		dsb(sy)
#define rmb()		dsb(ld)
#define wmb()		dsb(st)

#define dma_mb()	dmb(osh)
#define dma_rmb()	dmb(oshld)
#define dma_wmb()	dmb(oshst)
这里面的sy/ld/st的详细解释如下：
https://www.keil.com/support/man/docs/armasm/armasm_dom1361289870725.htm
10.34 DSB
Data Synchronization Barrier.

Syntax
DSB{cond} {option}
where:
cond
is an optional condition code.
Note
cond is permitted only in Thumb code. This is an unconditional instruction in ARM.
option
is an optional limitation on the operation of the hint. Permitted values are:
SY
Full system DSB operation. This is the default and can be omitted.
ST
DSB operation that waits only for stores to complete.
ISH
DSB operation only to the inner shareable domain.
ISHST
DSB operation that waits only for stores to complete, and only to the inner shareable domain.
NSH
DSB operation only out to the point of unification.
NSHST
DSB operation that waits only for stores to complete and only out to the point of unification.
OSH
DSB operation only to the outer shareable domain.
OSHST
DSB operation that waits only for stores to complete, and only to the outer shareable domain.
Operation
Data Synchronization Barrier acts as a special kind of memory barrier. No instruction in program order after this instruction executes until this instruction completes. This instruction completes when:
All explicit memory accesses before this instruction complete.
All Cache, Branch predictor and TLB maintenance operations before this instruction complete.
Alias
The following alternative values of option are supported for DSB, but ARM recommends that you do not use them:
SH is an alias for ISH.
SHST is an alias for ISHST.
UN is an alias for NSH.
UNST is an alias for NSHST.
如果要在非kernel的代码中用内存屏障，可以参考

arm
asm volatile("dsb\tisb"::: "memory")
x86
asm volatile("mfence"::: "memory")