C Compiler
CERT-
AURIX
缩写 | 全称 | 解释 |
---|---|---|
SRI | Shared Resource Interconnection | |
ECC | Error correction code | 错误校正码 |
PMI | Program Memory Interface | 从PFlash中读出提供指令到CPU |
SPB | System Peripheral Bus | 系统外围总线 |
FSI | Flash和SRAM管理器(状态机) | |
HSM | Hardware Security Module | |
PMA | Physical Memory Attribute Registers | |
DSPR | Data Scratch Pad SRAM | 数据暂存存储器 |
DMI | Data Memory Interface | 数据存储器接口 |
PSPR | Program Scratch Pad RAM | |
LUM | Local Memory Unit | |
TAG | bus master identification lines | 总线主控标示线 |
DCache | Data Cache SRAM | 高速缓冲存储器 |
PMU | Program Memory Unite | |
SRN | Service Request Nodes | |
ICU | Interrupt Control Unit | |
SRC | Service Request Control Register | |
IR | Interrupt Router | |
GPSR | General Purpose Service Request Nodes | |
TCN | Trap Class Nummber | |
TIN | Trap Identification Number | |
MPU | Memory Protection Unit | |
BCU | Bus Control Unit | |
ACCEN | Access Enable Register | |
SAR ADCs | Successive Approximation Register(逐次逼近型寄存器) ADC | 逐次逼近型ADC |
SMU | Safety Management Unit | |
CCU | Clocking and Clock Control Unit | |
CAPCOM | Capture Compare Unit | |
ATOM | ARU-connected Timer Output Module | |
ARU | Advanced Routing Unit | |
ICM | Interrupt Concentrator Module | |
ISA | Instruction Set Architecture | |
SIMD | Single Instruction Multiple Data | |
STMs | Software Managed Tasks | |
CSAs | Context Save Areas | |
SRNS | Service Request Nodes | |
DMA | Direct Memory Access | |
GPRs | General Purpose Registers | 通用寄存器 |
CDC | Core Debug Controller | |
SSW | Startup Software | |
ABM | Alternate Boot Modes | |
BMI | Boot Mode Index | |
BMHDID | Boot Mode Header ID | 确认代码(B359) |
ASC | Asynchronous Serial Interface | |
CAN | Controller Area Network | |
Bootstrap Loading | BSL | |
EVR | Embedded Voltage Regulator | 嵌入式电压调节器 |
PC | Program Counter register | 程序计数器寄存器 |
PCP | Peripheral Control Processor | 外围控制处理器 |
VMA | Virtral address | 虚拟地址 |
LMA | load address | 加载地址 |
PSW | Program Status Word Register | 程序状态字寄存器 |
CSFR | CPU Core Special Function Registers | 内核特殊功能寄存器 |
SoC | System-on-Chip | |
LDO | Linear Drop Out regulator topology | |
SMPS | Switch Mode Power Supply regulator topology | |
UCB | User Configuration Block in Flash | |
BIV | Base Interrupt Vector table/Base Trap Vector table | |
ISP | Interrupt Stack Pointer | |
ESR | External Serveice Requests | |
MTU | Memory Test Unit | |
MBIST | Memory Build In Self Test | |
FPI | Flexible Peripheral Interconnect(Bus protocol) | |
OPT | One-Time Programmable | these flash sections be changed anymore |
OTGS | Central OCDS Trigger Switch | OCDS Trigger Switch. Routes triggers to pins, for halt/suspend, etc. |
CSMCA/CD | Carrier Sense Multiple Access/Collision Dection | |
NDA | Non-Destructive Arbitration | |
NRZ | Non-Return-To-Zero | |
SOF | Start-Of-Frame | 起始位 |
RTR | Remote Transmission Request | recessive - Remote Frame |
IDE | Identifier Extension | recessive -Extended Frame |
DLC | Data length Code | |
CRC | Cyclic Redundancy | |
EOF | End-of-Frame | Seven Recessive bits |
SRR | Substitute Remote Request | Recessive bit |
XRO | BitWise | 按位或 |
LFSR | Linear Feedback Shift Register | 线性反馈移位寄存器 |
问题
Hightec编译器出现的问题
工程名称意外改变,.project文件中的Name字段更改
Flash参数
Name | explain | position |
---|---|---|
擦除单元 | ||
烧写单元 | 32 byte/256 byte | 901/906 |
DFlash 烧写 | 8 byte/32b yte | 902/905 |