简介:
设计一个交通灯控制器,在数码管上以红、黄、绿三种颜色显示当前状态的剩余时间。持续时间分别为:红灯30s,黄灯5s,绿灯30s。初始为红灯,依次变为绿灯、黄灯、红灯循环显示。输入时钟为1k Hz。
系统设计:
分析需求,可将交通控制器系统划分为generate_1s、controller、counter、splitter和decoder5_7共五个模块实现。
交通灯控制器顶层框图如下:
controller状态转移图如下:
Verilog完整代码实现如下:
/*-------------------------------------------------
Filename: traffic_light_controller.v
Function: 交通灯控制器顶层模块(用于综合成实际电路)
Author: Zhang Kaizhou
Date: 2019-11-17 14:28:50
-------------------------------------------------*/
`include "generate_1s.v"
`include "counter.v"
`include "controller.v"
`include "splitter.v"
`include "decoder5_7.v"
module traffic_light_controller(sys_clk, reset, data_high, data_low, state);
//输入输出端口定义
input sys_clk, reset;
output [1 : 0] state;
output [6 : 0] data_high, data_low;
//内部寄存器及连线定义
wire count_clk;
wire [6 : 0] data;
wire [3 : 0] data_shi, data_ge;
//逻辑实现
generate_1s generate_1s_m0(.sys_clk(sys_clk), .reset(reset), .y(count_clk));
counter counter_m0(.count_clk(count_clk), .reset(reset), .data(data));
controller controller_m0(.clk(count_clk), .reset(reset), .din(data), .state(state));
splitter splitter_m0(.data(data), .data_shi(data_shi), .data_ge(data_ge));
decoder5_7 decoder5_7_m0(.reset(reset), .data_shi(data_shi), .data_ge(data_ge), .data_high(data_high), .data_low(data_low));
endmodule
/*--------------------------------------