简介:
用门级描述的方法写一个2-4线译码器。逻辑电路图如下:
Verilog代码如下:
/*------------------------------------
Filename: decoder_2to4.v
Function: 2-4线译码器(输出低电平有效)
Author: Zhang Kaizhou
Date: 2019-9-6 16:17:58
-------------------------------------*/
module decoder_2to4(Y, A0, A1, E);
//端口定义
input A0, A1, E;
output [3 : 0] Y;
wire nA0, nA1, nE; //内部连线
//门级描述
not n1(nE, E), n2(nA0, A0), n3(nA1, A1);
nand nd1(Y[0], nE, nA0, nA1), nd2(Y[1], nE, A0, nA1),
nd3(Y[2], nE, nA0, A1), nd4(Y[3], nE, A0, A1);
endmodule
/*---------------------------
Filename: decoder_2to4_tb.v
Function: 测试代码
Author: Zhang Kaizhou
Date: 2019-9-7 11:45:57
---------------------------*/
`timescale 1ns/1ns
module decoder_2to4_tb(Y);
output [3 : 0] Y;
wire [3 : 0] Y;
reg E, A0, A1;
initial
begin
E = 1