FPGA的LED点灯程序

`timescale 1ns / 1ps
//
// Company:
// Engineer:
//
// Create Date: 06:47:31 09/02/2022
// Design Name:
// Module Name: second_led
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//
module second_led(
input clk,
input rst_n,
output reg led1,
output reg led2,
output reg led3,
output reg led4

);

reg [25:0] count;
reg [3:0] led_bits;
parameter TIME_1_S = 26’d49_999_999;

always @( posedge clk or negedge rst_n)
begin
if(rst_n == 1’b0)
begin
count <= 26’d0;

		  end
	  else if(count < TIME_1_S)
			count <= count + 1'd1;
	  else
			count <= 1'd0;
 
 
 end

always @( posedge clk or negedge rst_n)
begin
if(rst_n == 1’b0)
begin

	     led_bits <= 4'b0001;
		  end
	  else if(count < TIME_1_S)
			led_bits <= {led_bits[2:0],led_bits[3]};
	  else
			led_bits <= led_bits;
 
 
 end

always @( posedge clk or negedge rst_n)
begin
if(rst_n == 1’b0)
begin
led1 <= 1’d0;
led2 <= 1’d0;
led3 <= 1’d0;
led4 <= 1’d0;

		  end
	  else if(count == TIME_1_S )
			begin
			  led1 <= led_bits[0];
			  led2 <= led_bits[1];
			  led3 <= led_bits[2];
			  led4 <= led_bits[3];				
			end
    else
       begin
			  led1 <= led1;
			  led2 <= led2;
			  led3 <= led3;
			  led4 <= led4;			  
		  end
	  
		
 end

endmodule

// Module Function:进过按键消抖后控制led显示翻转

module debounce (clk,rst,key,led);

    input             clk;
    input             rst;
    input 	          key;                      				
output   reg      led;        

    wire              key_pulse;

    //当按键按下时产生一个高脉冲，翻转一次led
    always @(posedge clk  or  negedge rst)
       begin
         if (!rst) 
	led <= 1'b1;
     else if (key_pulse)
	led <= ~led;
     else
            led <= led;
   end    

// always @(posedge clk)
// begin
// if (key_pulse)
// led <= ~led;
// else
// led <= led;
// end
//例化消抖module，这里没有传递参数N，采用了默认的N=1
debounce_button u1 (
.clk (clk),
.rst (rst),
.key (key),
.key_pulse (key_pulse)
);
endmodule