FPGA IMPLEMENT 1Gb/10Gb ETH（四.1 MAC）

xilinx提供了三速以太网MAC层的IP：tri_mode_ethernet_mac，此IP的用户接口经过简化，使用AXI_stream接口连接用户逻辑，另外一侧使用GMII/MII连接PHY，此处的PHY可以是外部PHY芯片，也可以连接gig_eth_pca_pma的IP，gig_eth_pca_pma可以两种形式，BASE-X时内部实现PHY层，外面直连SFP光模块，SGMII时提供一个GMII转SGMII的桥然后再外接PHY芯片；

BASE-T     PHYs provide a link between the MAC and copper mediums. This functionality
is not offered within the TEMAC. However, external BASE-T PHY devices are readily
available on the market. These can connect to the Ethernet MAC, using GMII/MII,
RGMII, or, by additionally using the Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII
LogiCORE, SGMII interfaces.
BASE-X     PHYs provide a link between the MAC and (usually) fiber optic mediums. The
TEMAC is capable of supporting the 1 Gb/s BASE-X standard; 1G/2.5G PCS and PMA
sublayers can be offered by connecting the TEMAC to the Ethernet 1G/2.5G BASE-X
PCS/PMA or