题目:设计BCD译码器,输入0~9。
BCD译码器也称为4-10线译码器
module Decode_4_10(
input [3:0] indata,
//output reg [9:0] outdata
output [9:0] outdata
);
/*
always @(*)begin
case(indata)
4'b0000: outdata = 10'b1111_1111_10;
4'b0001: outdata = 10'b1111_1111_01;
4'b0010: outdata = 10'b1111_1110_11;
4'b0011: outdata = 10'b1111_1101_11;
4'b0100: outdata = 10'b1111_1011_11;
4'b0101: outdata = 10'b1111_0111_11;
4'b0110: outdata = 10'b1110_1111_11;
4'b0111: outdata = 10'b1101_1111_11;
4'b1000: outdata = 10'b1011_1111_11;
4'b1001: outdata = 10'b0111_1111_11;
default: outdata = 10'b1111_1111_11;
endcase
end
*/
assign outdata[0] = ~(~indata[3] & ~indata[2] & ~indata[1] & ~indata[0]);
assign outdata[1] = ~(~indata[3] & ~indata[2] & ~indata[1] & indata[0]);
assign outdata[2] = ~(~indata[3] & ~indata[2] & indata[1] & ~indata[0]);
assign outdata[3] = ~(~indata[3] & ~indata[2] & indata[1] & indata[0]);
assign outdata[4] = ~(~indata[3] & indata[2] & ~indata[1] & ~indata[0]);
assign outdata[5] = ~(~indata[3] & indata[2] & ~indata[1] & indata[0]);
assign outdata[6] = ~(~indata[3] & indata[2] & indata[1] & ~indata[0]);
assign outdata[7] = ~(~indata[3] & indata[2] & indata[1] & indata[0]);
assign outdata[8] = ~(indata[3] & ~indata[2] & ~indata[1] & ~indata[0]);
assign outdata[9] = ~(indata[3] & ~indata[2] & ~indata[1] & indata[0]);
endmodule```