一.RK3568 lvds输出硬件原理图
从硬件原理图可知,lvds有4组差分信号,1组时钟,还有供电引脚。
二.LVDS设备树配置
panel: panel {
compatible = "simple-panel";
backlight = <>;
power-supply = <>;
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB666_1X7X3_SPWG>;
width-mm = <217>;
height-mm = <136>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <36000000>;
hactive = <1