基于MSP432E401y-IIC的OLED控制

首先要知道IIC的原理:IIC基本原理

 基于IIC的原理配置OLED源文件

#define OLED_SCLK_Clr()  MAP_GPIOPinWrite(GPIO_OLED_SCLK_PORT_BASE,GPIO_OLED_SCLK_PIN,0)    //OLED_SCL=0
#define OLED_SCLK_Set()  MAP_GPIOPinWrite(GPIO_OLED_SCLK_PORT_BASE,GPIO_OLED_SCLK_PIN,0xFF) //OLED_SCL=1

#define OLED_SDIN_Clr()  MAP_GPIOPinWrite(GPIO_OLED_DAT_PORT_BASE,GPIO_OLED_DAT_PIN,0)     //OLED_SDIN=0
#define OLED_SDIN_Set()  MAP_GPIOPinWrite(GPIO_OLED_DAT_PORT_BASE,GPIO_OLED_DAT_PIN,0xFF) //OLED_SDIN=1;

void delay_ms(unsigned int ms)
{
    unsigned int a;
    while (ms)
    {
        a = 1800;
        while (a--)
            ;
        ms--;
    }

}
//发送一个字节
//向SSD1306写入一个字节。
//mode:数据/命令标志 0,表示命令;1,表示数据;


void IIC_Start()
{

    OLED_SCLK_Set() ;
    OLED_SDIN_Set();
    OLED_SDIN_Clr();
    OLED_SCLK_Clr();
}

void IIC_Stop()
{
    OLED_SCLK_Set() ;
//  OLED_SCLK_Clr();
    OLED_SDIN_Clr();
    OLED_SDIN_Set();

}
void IIC_Wait_Ack()
{
    OLED_SCLK_Set() ;
    OLED_SCLK_Clr();
}
void Write_IIC_Byte(unsigned char IIC_Byte)
{
    unsigned char i;
    unsigned char m,da;
    da=IIC_Byte;
    OLED_SCLK_Clr();
    for(i=0;i<8;i++)
    {
            m=da;
        //  OLED_SCLK_Clr();
        m=m&0x80;
        if(m==0x80)
        {OLED_SDIN_Set();}
        else OLED_SDIN_Clr();
            da=da<<1;
        OLED_SCLK_Set();
        OLED_SCLK_Clr();
     }
}
void Write_IIC_Command(unsigned char IIC_Command)
{
   IIC_Start();
   Write_IIC_Byte(0x78);            //Slave address,SA0=0
    IIC_Wait_Ack();
   Write_IIC_Byte(0x00);            //write command
    IIC_Wait_Ack();
   Write_IIC_Byte(IIC_Command);
    IIC_Wait_Ack();
   IIC_Stop();
}
void Write_IIC_Data(unsigned char IIC_Data)
{
   IIC_Start();
   Write_IIC_Byte(0x78);            //D/C#=0; R/W#=0
    IIC_Wait_Ack();
   Write_IIC_Byte(0x40);            //write data
    IIC_Wait_Ack();
   Write_IIC_Byte(IIC_Data);
    IIC_Wait_Ack();
   IIC_Stop();
}
void OLED_WR_Byte(unsigned dat,unsigned cmd)
{
    if(cmd)
     {

         Write_IIC_Data(dat);

        }
    else {
         Write_IIC_Command(dat);

    }


}

头文件:

#define OLED_ADDRESS 0x3C //通过调整0R电阻,屏可以0x78和0x7A两个地址 -- 默认0x78  0x3C = 0x78 >> 1
#define GPIO_OLED_DAT_PORT_BASE     GPIO_PORTG_BASE  //OLED屏D1连接端口
#define GPIO_OLED_DAT_PORT_SYSCTL   SYSCTL_PERIPH_GPIOG
#define GPIO_OLED_DAT_PIN           GPIO_PIN_0

#define GPIO_OLED_SCLK_PORT_BASE    GPIO_PORTG_BASE  //OLED屏D0连接端口
#define GPIO_OLED_SCLK_PORT_SYSCTL  SYSCTL_PERIPH_GPIOG
#define GPIO_OLED_SCLK_PIN          GPIO_PIN_1

#define  u8 unsigned char
#define  u32 unsigned int
#define OLED_CMD  0 //写命令
#define OLED_DATA 1 //写数据
//OLED模式设置
//0:4线串行模式
//1:并行8080模式
//此项目程序使用的是串行模式
#define OLED_MODE 0

#define SIZE 16
#define XLevelL     0x02
#define XLevelH     0x10
#define Max_Column  128
#define Max_Row     64
#define Brightness  0xFF
#define X_WIDTH     128
#define Y_WIDTH     64

其他配置只需简单更改即可。

源码链接:https://pan.baidu.com/s/15EMWsgLai3qLiutOvFJYmQ 
提取码:1111 
 

  • 0
    点赞
  • 7
    收藏
    觉得还不错? 一键收藏
  • 打赏
    打赏
  • 1
    评论
MSP432 低功耗高性能并存10.1 Digital I/O Introduction The digital I/O features include: • Independently programmable individual I/Os • Any combination of input or output • Individually configurable interrupts for ports (available for certain ports only) • Independent input and output data registers • Individually configurable pullup or pulldown resistors • Wake-up capability from ultra-low power modes (available for certain ports only) • Individually configurable high drive I/Os (available for certain I/Os only) Devices within the family may have up to eleven digital I/O ports implemented (P1 to P10 and PJ). Most ports contain eight I/O lines; however, some ports may contain less (see the device-specific data sheet for ports available). Each I/O line is individually configurable for input or output direction, and each can be individually read or written. Each I/O line is individually configurable for pullup or pulldown resistors. Certain ports have interrupt and wake-up capability from ultra-low power modes (see device specific data sheet for ports with interrupt and wake-up capability). Each interrupt can be individually enabled and configured to provide an interrupt on a rising or falling edge of an input signal. All interrupts are fed into an encoded Interrupt Vector register, allowing the application to determine which sub-pin of a port has generated the event. Individual ports can be accessed as byte-wide ports or can be combined into half-word-wide ports. Port pairs P1 and P2, P3 and P4, P5 and P6, P7 and P8, and so on, are associated with the names PA, PB, PC, PD, and so on, respectively. All port registers are handled in this manner with this naming convention. The main exception are the interrupt vector registers, for example, interrupts for ports P1 and P2 must be handled through P1IV and P2IV, PAIV does not exist. When writing to port PA with half-word operations, all 16 bits are written to the port. When writing to the lower byte of port PA using byte operations,

“相关推荐”对你有帮助么?

  • 非常没帮助
  • 没帮助
  • 一般
  • 有帮助
  • 非常有帮助
提交
评论 1
添加红包

请填写红包祝福语或标题

红包个数最小为10个

红包金额最低5元

当前余额3.43前往充值 >
需支付:10.00
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包

打赏作者

Sunxinuai

你的鼓励将是我创作的最大动力

¥1 ¥2 ¥4 ¥6 ¥10 ¥20
扫码支付:¥1
获取中
扫码支付

您的余额不足,请更换扫码支付或充值

打赏作者

实付
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明:

1.余额是钱包充值的虚拟货币,按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载,可以购买VIP、付费专栏及课程。

余额充值