zynq arm中断系统初始化流程(2018.2 vivado)

对于emio的中断而言,64个管教共用一个中断id,每次有中断都会有两次进入中断处理函数,分别是Bank2、Bank3,所以在中断处理函数中应当过滤掉不是目的管教的中断。使用xgpiops_intrgetstatus()函数来确定是不是目的管教的中断。

1、初始化异常处理

Xil_ExceptionInit();

2、初始化中断控制器

XScuGic_LookupConfig();
//中断GIC ID
XScuGic_CfgInitialize();
//指向CPUbaseaddress

3、注册异常处理回调函数到CPU

Xil_ExceptionRegisterHandler();

//XIL_EXCEPTION_ID_INT

4、连接GPIO中断信号并注册gpio回调函数

XScuGic_Connect(XScuGic *InstancePtr, u32 Int_Id,
                      Xil_InterruptHandler Handler, void *CallBackRef)
//int_id gpio is 52 

5、设置gpio中断类型

XGpioPs_SetIntrType(XGpioPs *InstancePtr, u8 Bank, u32 IntrType,
			  u32 IntrPolarity, u32 IntrOnAny)
//u8 bank : mio bank is 0/1;emoi bank is 2/3;
//u32 intrtype :  0 is low level else 1 is high level 
//u32 IntrPolarity: 0 means Active Low or Falling Edge and 1 means Active High or Rising //Edge.
//u32 IntrOnAny:0 means trigger on single edge using the configured interrupt polarity and 1 means  trigger on both edges.

6、设置GPIO的回调函数

XGpioPs_SetCallbackHandler(XGpioPs *InstancePtr, void *CallBackRef,
				 XGpioPs_Handler FuncPointer)
//XGpioPs_Handler FuncPointer is uesr's function

7、使能对应pin的中断

XGpioPs_IntrEnable(XGpioPs *InstancePtr, u8 Bank, u32 Mask)

// u8 bank is commom with XGpioPs_SetIntrType

8、使能中断控制器中的gpio中断

XScuGic_Enable(XScuGic *InstancePtr, u32 Int_Id)
//u32 Int_Id is commom with XScuGic_Connect

9、使能异常处理

Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
//Mask: Value for enabling the exceptions

总的模块

static int SetupInterruptSystem(XScuGic *GicInstancePtr, XGpioPs *Gpio,
				u16 GpioIntrId)
{
	int Status;

	XScuGic_Config *IntcConfig; /* Instance of the interrupt controller */

	Xil_ExceptionInit();

	/*
	 * Initialize the interrupt controller driver so that it is ready to
	 * use.
	 */
	IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return XST_FAILURE;
	}

	Status = XScuGic_CfgInitialize(GicInstancePtr, IntcConfig,
					IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}


	/*
	 * Connect the interrupt controller interrupt handler to the hardware
	 * interrupt handling logic in the processor.
	 */
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
				(Xil_ExceptionHandler)XScuGic_InterruptHandler,
				GicInstancePtr);

	/*
	 * Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined above performs
	 * the specific interrupt processing for the device.
	 */
	Status = XScuGic_Connect(GicInstancePtr, GpioIntrId,
				(Xil_ExceptionHandler)XGpioPs_IntrHandler,
				(void *)Gpio);
	if (Status != XST_SUCCESS) {
		return Status;
	}

	/* Enable falling edge interrupts for all the pins in bank 0. */
	XGpioPs_SetIntrType(Gpio, GPIO_BANK, 0x00, 0xFFFFFFFF, 0x00);

	/* Set the handler for gpio interrupts. */
	XGpioPs_SetCallbackHandler(Gpio, (void *)Gpio, IntrHandler);


	/* Enable the GPIO interrupts of Bank 0. */
	XGpioPs_IntrEnable(Gpio, GPIO_BANK, (1 << Input_Pin));


	/* Enable the interrupt for the GPIO device. */
	XScuGic_Enable(GicInstancePtr, GpioIntrId);


	/* Enable interrupts in the Processor. */
	Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);

	return XST_SUCCESS;
}

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