FPGA学习笔记2--点亮led

设计流程：

 

module LED(a,b,key_in,led_out);

	input a;//输入端口a
	input b;//输入端口b
	
	input key_in;//按键输入，实现输入通道的选择
	
	output led_out;//led控制端口
	
	//当key_in==0，led_out==a
	assign led_out = (key_in == 0)? a : b;
	
	
	
endmodule

仿真文件（textbench） 

`timescale 1ns/1ps//仿真延时，仿真精度

module LED_tb;//表示此为testbench文件，仿真对象为LED

   //激励信号定义，对应连结到待检测模块输入端口
	reg signal_a;
	reg signal_b;
	reg signal_c;
	
	//待检测信号定义，对应链接到待检测模块输出端口
	wire led;
	
	//例化测试模块
	LED led_text0(//类似于调用C语言中的函数
	.a(signal_a),
	.b(signal_b),
	.key_in(signal_c),
	.led_out(led)
	);
	
	//产生激励
	initial begin	//定义一个激励信号源
		signal_a = 0; signal_b = 0; signal_c = 0;
		#1000;//延时时间，由开始定义延时100ns 
		signal_a = 0; signal_b = 0; signal_c = 1;
		#100;
		signal_a = 0; signal_b = 1; signal_c = 0;
		#100;
		signal_a = 1; signal_b = 0; signal_c = 0;
		#100;
		signal_a = 0; signal_b = 1; signal_c = 1;
		#100;
		signal_a = 1; signal_b = 0; signal_c = 0;
		#100;
		signal_a = 1; signal_b = 0; signal_c = 1;
		#100;
		signal_a = 1; signal_b = 1; signal_c = 1;
		#200;
		$stop;//停止仿真
	end
		
		
		

endmodule