1.1 Overview
Timemultiplex hardware dynamically on a single FPGA is advantageous:
figure1.1 Basic Premise of Partial Reconfiguration
Aftera full BIT file configures the FPGA, partial BIT files can be downloaded tomodify reconfigurable regions in the FPGA without compromising the integrity ofthe applications running on those parts of the device that are not beingreconfigured.
Partial Reconfiguration is time multiplex ,and it's advantage :
• Reducing the size of the FPGA required to implement a givenfunction, with consequent
reductionsin cost and power consumption
• Providing flexibility in the choices of algorithms or protocolsavailable to an application
• Enabling new techniques in design security
• Improving FPGA fault tolerance
• Accelerating configurable computing