USB JTAG adapter

 

http://www.ixo.de/info/usb_jtag/
http://www.edaboard.com/ftopic114946-0-asc-0.html

Project Background

The goal of the project was to build a budget USB JTAG adapter. Basically it should allow direct I/O access to the JTAG signals from an USB host, but additionally implement some sort of parallel/serial conversion as well for higher transfer rates. While a combination of USB I/O device like FTDI FT245BM with a custom logic for the parallel/serial conversion could be used, I started with a prototype implementation in software on a Cypress EZ-USB FX2 controller. That happens to be the controller in a device manufactured by my employer, where it is used to configure an Altera Cyclone device. That gave me a nice platform for testing.

On the USB side, it now uses the same protocol as Altera's USB-Blaster. The drivers that I developed for my adapter do work with the Blaster as well. To the host PC, the only really noticeable difference are vendor and product ID and the product description string (0x16C0/0x06AD/USB-JTAG-IF instead of 0x9FB/0x6001/USB-Blaster).

Myth busting

USB JTAG isn't USB JTAG

There are so many "USB JTAG adapters" and all are different and usually incompatible. There's no single "USB JTAG" standard. There even may exist many different USB JTAG adapters for the same target hardware, but which are incompatible to each other with regard to the software on the host.

You should first look for a development software that is right for your target. And then, afterwards, look for an USB JTAG adapter that is compatible with that software. The adapter presented here is compatible with openwince and OpenOCD, and easily can be made compatible with Altera software. But on the other hand, openwince works better with generic parallel port adapters, and OpenOCD works better with FT2232-based adapters. See the OpenOCD page for more info about that.

USB JTAG adapters aren't necessarily faster than parallel port adapters

In fact, higher bit rates are possible - but not necessarily with every given USB adapter just because it works over USB. It also depends on the host software; it has to be written so that it specifically supports USB adapters. If you connect a parallel port adapter through an "USB to parallel port converter", it'll be dead slow. But that's not the fault of the parallel port adapter...

The adapter presented here is (circa) as fast as a parallel port adapter with proper software. You'll probably prefer it over a parallel port solution anyway, simply because many hosts (especially notebooks) nowadays don't have a parallel port anymore and USB connectors are less bulky...

Why use this one?

A reason to consider my design can be (at least) one of the following:

• You're looking for an USB JTAG adapter that can be used with openwince or Altera software
• You already have a Cypress FX2 USB Controller in your design that you want to use to control other devices via JTAG.
• You're curious to find out how a FX2 is able to (partially) emulate a FTDI FT245.

Download

I've restructured my working area for this project and prepared a number of new readme files. Please let me know if you find any errors, even simple typos! And due to the switch to a completely new code basis for the FX2 firmware, things that used to work stable may be unstable now... But so far I haven't seen more problems with the new code.

• usb_jtag-20070215-1134.zip (contains all C and VHDL sources for firmware, logic, and driver patches)

Drivers for openwince jtag tools and OpenOCD are included in the ZIP. Note: by default, the drivers look for an adapter with Altera's USB-Blaster vendor/product ID (from the driver's view, the only difference between the adapters is the ID). To detect an adapter with my ID instead, additional configuration is needed.

News

2007-02: I have taken the USRP firmware from the GNU Radio Project to construct a new FX2 firmware that can be built with SDCC instead of Keil tools. I hope I'll be able to make it more portable, so in the future maybe it can be built for Silicon Labs and Cypress chips as you like. Summary of new features in this release:

• Written to be compiled with SDCC, not Keil
• On-the-fly computation of "EEPROM" contents from the descriptor data (with checksum)
• Better support in code layout for different hardware
• Can be built to run on Xilinx Spartan-3E Starter Kit and possibly Platform Cable USB

2007-01: The "notes" about using my firmware on a Xilinx Platform Cable USB have been extended and now contain a link to download a basic openwince patch to support the Xilinx cable directly (with original firmware and CPLD code)

2007-01: A new release ZIP has been prepared. It contains all firmware source code, logic definitions and the driver code for OpenOCD and openwince JTAG. Some sections that previously were on this page now can be found in readme files within the ZIP file.

Links and related projects

There are at least two long-living discussion threads where this project is mentioned and discussed:

• In the fpga4fun Forum
• And in this discussion at www.edaboard.com

I'm notified about new posts there, so you're encouraged to ask questions of public interest about usbjtag online in those forums.

Other projects which utilize my FX2 firmware (I'm happy to learn about more!):

• The Saxo and Xylo FPGA development boards from fpga4fun.com.
• The FPGA4U board, designed in the EPFL. An adapted version of the firmware is available from the Wiki there.

Hardware suggestions

Below, three different hardware variants are shown in principle. Two are based on intelligent USB microcontrollers, one makes use of FTDI's FT245 USB-to-parallel chip.

Unfortunately, I do not have the time to present finished schematics for either variant of the USB JTAG adapter. As the source is quite incomplete anyway, if you're using it you're probably one of those people who easily can make up their own schematics. In principle, they are like the drawings below (best viewed with fixed-width font!). Add power supply, voltage regulator(s), level shifter, termination resistors, and more, as required...

Variant A: Cypress FX2

Using Cypress FX2 as USB JTAG Adapter, booted from host PC (no EEPROM)

              ____________
             |            |
             | Cypress    |
        USB__| EZ-USB FX2 |__JTAG(TDI,TDO,TCK,TMS)
             | CY7C68013A |
             |____________|
              __|__________
             |             |
             | 24 MHz XTAL |
             |_____________|

Variant B: FTDI FT245 plus CPLD

Using FTDI FT245BM plus EEPROM 93C46 plus CPLD EPM7064

              _________
             |         |
             | AT93C46 |
             |_________|
              __|__________    _________
             |             |  |         |
        USB__| FTDI 245BM  |__| EPM7064 |__JTAG (B_TDO,B_TDI,B_TMS,B_TCK)
             |_____________|  |_________|
              __|__________    _|___________
             |             |  |             |
             | 6 MHz XTAL  |  | 24 MHz Osc. |
             |_____________|  |_____________|

Note: The newer FT245R has on-chip EEPROM and oscillator, so the 93C46 and 6 MHz XTAL aren't needed anymore. Furthermore it can output 12 MHz on OSCO; it maybe possible to use the clock for the EPM7064 (then running at half the original speed).

A working implementation with CPLD can be seen in the upper right of this picture, connected to an Altium Live Design Evaluation Board EB2, Cyclone Edition, instead of the parallel port cable. The board at the bottom of the picture was a PCI Ethernet card. I desoldered the PCI MAC chip and instead wired the PHY directly to the EB2; to evaluate OpenCores Ethernet MAC in the FPGA. USB has been added as a module with just an USB transceiver and 48 MHz oscillator on it, driven by OpenCores.org USB 1.1 function core.

Variant C: SiLabs C8051F32x

Using Silicon Laboratories C8051F32x with firmware in integrated flash (unfinished)

              ____________
             |            |
             | SiLabs     |
        USB__| C8051F32x  |__JTAG(TDI,TDO,TCK,TMS)
             |____________|
 

Variant C isn't finished yet. I first tried to implement it on a C8051F326, after I managed to wire up such a chip to a demo board (the "Toolstick-EK"). It turned out that a F326 isn't suited for this task because it can't have an EP2 OUT as the FT245 uses. However, the F321 should work, and my next goal is to build a replacement firmware for the "Toolstick Base Adapter with Debug Adapter". Thanks to Ricky who's working on the EC2DRV project; he's already has been a great help while finding out how to upload firmware to the Toolstick.

Xilinx Platform Cable USB

Also known as "Variant D"...

The Xilinx cable, "XPCU", consists of a CY7C68013A (FX2) plus CPLD. With a little research about the CPLD functions, I was able to adapt my firmware so it can be run on the XPCU. The necessary changes are included in the latest release above. In theory, it is possible to turn the XPCU into an USB-Blaster using that firmware ;) - I practically tested it on the Spartan-3E starter kit (with embedded "cable"). The CPLD doesn't have to be modified.

While working with it, I also wrote an experimental driver for openwince to support the XPCU with original Xilinx firmware and CPLD. The following download contains most of my experimental code. It is unstable and needs to be compiled with gcc 3.4.x, not gcc 4.x due to some minor problems in the openwince code. It uses a simple bit banging mode of the cable (there are plenty more and faster modes available, but more complicated to drive).

• owjtag-xpcu-20070131-1953.patch.gz

However, to use the cable with free software, I recommend to load my firmware instead on the cable and use the drivers for usb_jtag, above. No one knows if my drivers are compatible with the next firmware release from Xilinx (well, the CPLD might change as well, but I think the basic functions used by my driver will stay for some time).

I'd be interested to hear if my firmware works with a real XPCU, not just with the starter kit?

Sample output of patched openwince jtag:

jtag> cable xpcu * xpc_ext
Initializing Xilinx Platform Cable USB external chain, device *
firmware version = 0x0401 (1025)
cable CPLD version = 0x0012 (18)
jtag> detect
IR length: 22
Chain length: 3
Device Id: 00000110111001011110000010010011
  Manufacturer: Xilinx
  Part:         XC2C64-VQ44
  Stepping:     0
  Filename:     /usr/local/share/jtag/xilinx/xc2c64a-vq44/xc2c64a-vq44
Device Id: 11110101000001000110000010010011
  Manufacturer: Xilinx
  Part:         XCF04S-VO20
  Stepping:     F
  Filename:     /usr/local/share/jtag/xilinx/xcf04s-vo20/xcf04s-vo20
Device Id: 00000001110000100010000010010011
  Manufacturer: Xilinx
  Part:         XC3S500E-FG320
  Stepping:     0
  Filename:     /usr/local/share/jtag/xilinx/xa3s500e-fg320/xa3s500e-fg320
jtag> cable xpcu * xpc_int
Initializing Xilinx Platform Cable USB internal chain, device *
firmware version = 0x0401 (1025)
cable CPLD version = 0x0012 (18)
jtag> detect
IR length: 8
Chain length: 1
Device Id: 00010110110101001010000010010011
  Manufacturer: Xilinx
  Part:         XC2C256-VQ100
  Stepping:     1
  Filename:     /usr/local/share/jtag/xilinx/xc2c256-vq100/xc2c256-vq100

JTAG Tracing

In order to trace what's happening on the JTAG chain at the adapter, I've written this small Perl script lusbb_decode-20060903.pl. It is able to interpret log files from HHD's USB Monitor or Linux kernel messages from OpenOCD with libftd2xx or Altera's jtagd and show you the actual IR and DR scans. It does not work yet with libftdi. With kernel 2.6, you can enable those messages using the command

  echo 1 > /sys/module/usbcore/parameters/usbfs_snoop

Final note

Quartus, SignalTap and USB-Blaster are trademarks of Altera Corporation. ChipScope and probably "Platform Cable" are trademarks of Xilinx Inc.