STM32 - 定时器的设定 - 基础- 06 - OCxREF signal - Clearing the OCxREF signal on an external event

OCxREF signal 作为捕捉比较的定制化参考波形在对输出波形的配置上占有巨大的影响。如何将这个信号和外部输入的事件联系起来，能给系统的设计带来更多的可选择性。

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The OCxREF signal for a given channel can be driven Low by applying a High level to the ETRF（ETRF：External Trigger input） input (OCxCE enable bit of the corresponding TIMx_CCMRx register set to ‘1’).

The OCxREF signal remains Low until the next update event, UEV, occurs.

This function can only be used in output compare and PWM modes, and does not work in forced mode.

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For example, the ETR signal can be connected to the output of a comparator to be used for current handling.

In this case, the ETR must be configured as follow:

1. The External Trigger Prescaler should be kept off: bits ETPS[1:0] of the TIMx_SMCR register set to ‘00’.

2. The external clock mode 2 must be disabled: bit ECE of the TIMx_SMCR register set to ‘0’.

3. The External Trigger Polarity (ETP) and the External Trigger Filter (ETF) can be configured according to the user needs.

 

 

 

Figure 90 shows the behavior of the OCxREF signal when the ETRF Input becomes High, for both values of the enable bit OCxCE. In this example, the timer TIMx is programmed in PWM mode.

 

 

 

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参考：

STM32 - 定时器的设定 - 基础- 02 - Capture/compare channels 和相关设置寄存器

https://blog.csdn.net/yellow_hill/article/details/102083981