ATMega 328 analog interfacing

1.ADC:模拟数字转换器(Analog to Digital Converter)64d4642b12124f36a279b5fab3a23152.png

Actually,ADC is analog signal change digital signal. It mean the input is analog signal but output is already become binary code (machine code)

2.ADC in AVR programming

-ADCH:Data high register(数据高位寄存)“output data ”

-ADCL:Data low register(数据低位寄存)“output data ”

-ADMUX(ADC多路选择寄存器)“set data”

-ADCSRA(ADC控制和状态寄存器)“set data”

-ADCW (sent value to data read)“output data ”[data_read=ADCW]

3.calculate the step size for ADC

step size=Vref(depend on your system voltage)/2^n(number of step-number of ADC bit)

For example,

Look below graph:In this graph Vref is 5V,but have different size of bit,so:

Vcc=5V

step size=5V/2^n

296430462a83471ebc77b74655983be3.png

4.ADC Conversion Formula ADC (ADC的转换公式)

Dout=Vin/step size

For example:

For an 8 bit ADC,Vref=2.56V.If the analog input is 1.7V.The binary calculator process is:

2.56/2^8=10mV

Dout=1.7/10mV=170

so,170(decimal)-10101010(Binary)

5.ADC major characteristics
● Conversion Time

● Resolution
● Vref
● Parallel vs. serial

● Input channels

6.Internal ADC of ATMega 328

  • 10 bit resolution 
  • 6 multiplexed single ended input channels
  • 13-260us conversion Time
  • Up to 76.9KSPS
  • Optional left Adjustment for ADC result readout
  • 3 voltage sources:internal 1.1V,AVcc,AREF
  • Free running or Single Conversion Mode
  •  Interrupt on ADC Conversion Complete
  • Sleep Mode Noise Canceler

7.Hardware Consideration

cc4685cf13be48e790433eadb964c6c8.png

If Vcc=5V,the voltage through Vcc go to two parallel circuits-AVREF and AVCC.

8.Special Function Registers of ADC
ADMUX – ADC Multiplexer Selection Register
:To select the input analog channels, source of clock reference, and result alignment of the ADCL and ADCH register
ADCSRA – ADC Control and Status Register A
:To control the operation of ADC and indicate the status of ADC conversion.
ADCL and ADCH – The ADC Data Register

:To store the ADC conversion output.

9.ADMUX

If I want to set REFS0=1

The code below 

ADMUX=ADMUX|(1<<REFS0);
//REFS1=0,REFS0=1

ADMUX=ADMUX|(1<<REFS1)|(1<<REFS0)

//REFS1=1,REFS0=1

e5bf30722f704447bddff60ba1251b54.png
If I want to choose ADLAR=1,

the code is 

ADMUX=ADMUX|(1<<ADLAR);

//ADLAR=1

 

 

When ADLAR=1,the data start on the right 

When ADLAR=0,the data start on the left

3e8a0a90cfb94ebca721d3c93b45b5ea.png

^_^写累了,不想写了

 

 

 

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