Allegro的走线记忆功能在画板时,有时候反而会降低设计的速度,那如何取消呢?
在菜单栏选择Setup→User Preferences...(用户参数)
![](https://i-blog.csdnimg.cn/blog_migrate/107244e16cfd2f8feab880604968dba9.png)
在弹出的对话框左侧选择Route(布线)→Connect(连接),在acon_on_width_override_retian(走线宽度不保留)后面的框打钩。如下图:
![](https://i-blog.csdnimg.cn/blog_migrate/159395aea46d736cef6c348b8b008176.png)
修改后的走线效果,差分对默认的走线宽度是0.127mm;这里先用0.254mm的线宽走这组差分对,如下图
![](https://i-blog.csdnimg.cn/blog_migrate/255395139b767ec63cdeb6bfc00a1ffa.png)
然后在走下一组差分对时,软件会默认使用约束管理器中设置的差分对线宽0.127mm,而不是上次使用的0.254mm线宽。如下图
![](https://i-blog.csdnimg.cn/blog_migrate/94ad233723ec8a7fd68e2049972e3efa.png)
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Allegro provides a good and interactive working interface and powerful functions, and its front-end products Cadence, OrCAD, Capture, the combination of high-speed, high-density, multi-layer complex PCB design routing provides the most perfect solution.
Allegro has perfect Constraint Settings, users only need to set the wiring rules according to the requirements, and the design requirements of the wiring can be achieved without violating the DRC when routing, thus saving the tedious manual inspection time and improving the work efficiency!
It can also define parameters such as minimum wire-width or wire-length to meet the needs of today's high-speed circuit board wiring.
Constraint Manger provides a simple interface for users to set and view Constraint declarations.
Its combination with Capture allows E.E. electronics engineers to set up regular data when drawing a circuit diagram and bring it with them to the Allegro working environment, where it can be automatically processed and checked when placing parts and wiring. The empirical values of these regular data can be reused for the same nature of the circuit board design.
In addition to the above functions, Allegro's powerful automatic push and stick line and perfect automatic repair line function provide users with great convenience;
The powerful mapping function can provide multiple users to deal with a complex board at the same time, thus greatly improving the work efficiency.
Or use the optional graph cutting function to cut the circuit board into various blocks, so that each block has a full-time person at the same time to design, to achieve the purpose of the same graph design and can shorten the time course.
After renaming, online interchange and modifying logic during routing, users can easily return to Capture wiring diagram, and update the wiring diagram to Allegro after modification.
Users can also click and modify objects between Capture and Allegro.