Matlab
与
modelsim
的联合仿真
signal Generator
Demonstrate Link for ModelSim using MATLAB to implement a signal generator component.
*********************************************************************
----------------------------------------------------------------
-- Module: sig_generator
-- This module is wrapper for the MATLAB signal generator. This
-- level has just ports to connect to in MATLAB. See siggenerator.m for the details.
----------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
ENTITY sig_generator IS
PORT( clk : IN std_logic;
clk_enable : IN std_logic;
reset : IN std_logic;
signal_out : OUT real);
END sig_generator;
ARCHITECTURE matlab OF sig_generator IS
BEGIN
END matlab;
*********************************************************************
----------------------------------------------------------------
-- Module: siggen_top
-- This module is the top level and instantiates the empty
-- wrapper for the MATLAB component that acts as a signal generator.
----------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
ENTITY siggen_top IS
PORT( clk : IN std_logic;
clk_enable : IN std_logic;
reset : IN std_logic;
signal_out : OUT real);
END siggen_top;
ARCHITECTURE rtl OF siggen_top IS
COMPONENT sig_generator
PORT( clk : IN std_logic;
clk_enable : IN std_logic;
reset : IN std_logic;
signal_out : OUT real);
END COMPONENT;
FOR ALL : sig_generator
USE ENTITY work.sig_generator(matlab);
BEGIN
u_sig_generator: sig_generator
PORT MAP( clk => clk,
clk_enable => clk_enable,
reset => reset,
signal_out => signal_out);
END rtl;
*******************************************************************
function varargout = modsimsiggen(varargin)
% MODSIMSIGGEN - Demonstrate Link for ModelSim using MATLAB to implement a
% signal generator component.
% MODSIMSIGGEN shows how MATLAB can be used to implement a VHDL
% component that is used to drive to input of a VHDL project in ModelSim.
% This demo uses an empty project that displays the output being
% generated by the MATLAB component. It opens a GUI that allows the user
% to specify a wave type, amplitude and frequency and creates a VHDL
% componet that outputs a signal with these characteristics. A project
% containing this component is then c