Fault 异常或陷阱 分析

分为两部分：
1 参考资料浏览流水
2 代码分析
a.异常调转上下文分析

本文参考文献如下

一 . 参考资料浏览
讨论内容
This application note describes the usage of fault exceptions. It lists the peripheral registers in the System Control Block (SCB) that control fault exceptions or provide information of their cause. Software examples show the usage of fault exceptions during program debugging or for recovering errors in the application software.
1.SCB模块控制硬件异常并且可以提供硬件异常的信息。
2.在调试中可以观察硬件异常，或者在应用程序中进行异常恢复处理。

异常分类
有若干个系统异常专用于 fault 处理。 CM3 中的 Faults 可分为以下几类：
1 总线 faults
detects memory access errors on instruction fetch, data read/write, interrupt vector fetch,and register stacking (save/restore) on interrupt (entry/exit).

2 存储器管理 faults
detects memory access violations to regions that are defined in the Memory Management Unit (MPU); for example, code execution from a memory region with read/write access only.

3 用法 faults
detects execution of undefined instructions, unaligned memory access for load/storemultiple. When enabled, divide-by-zero and other unaligned memory accesses are detected.

4 硬 fault
HardFault: is the default exception and can be triggered because of an error during exception processing, or because an exception cannot be managed by any other exception mechanism.

硬件异常号和优先级
ARM Cortex M系列优先级数值越低逻辑上的优先级越高

硬件错误(3,上表异常号) 优先级为-1 ，其余(4,5,6)为可编程。reset后 4.5.6 默认为disable状态，可以在System Control Block (SCB)中配置。

Priority escalation
优先级升级
Usually, the exception priority, together with the values of the exception mask registers, determines whetherthe processor enters the fault handler, and whether a fault handler can preempt another fault handler.In some situations, a fault with configurable priority is treated as a HardFault. This is called priority escalation,and the fault is described as escalated to HardFault。
▪ A fault handler causes the same kind of fault as the one it is servicing. This escalation to HardFault
occurs because a handler cannot preempt itself (it must have the same priority as the current priority
level).
▪ A fault handler causes a fault with the same or lower priority as the fault it is servicing. This is because
the handler for the new fault cannot preempt the currently executing fault handler.
▪ An exception handler causes a fault for which the priority is the same as or lower than the currently
executing exception.
▪ A fault occurs and the handler for that fault is not enabled.
如果4,5,6异常没有被开启，那么发生异常时就会上升回到硬件异常，故优先级升级。

Synchronous and asynchronous BusFaults

同步意识是发生异常后即可处理异常，异常跳入的位置是发生错误的位置。
非同步意识是，发生错误后，异常处理并未立刻调转，又运行了其他的指令然后进行异常调转。这样异常发生的指令不好追溯。

Fault types in Keil MDK
在MDK环境中可以用Fault Reports dialog 来监控错误的类型。通过Bit Name 来判断错误发生的类型。

Fault exception registers异常处理相关的寄存器

The System Control Block (SCB) provides system implementation information, and system control. This includes configuration, control, and reporting of the system exceptions. Some of its registers are used to control fault exceptions
System Control Block (SCB) SCB模块可以提供异常的信息。

▪ The Configuration and Control Register CCR register controls the behavior of the UsageFault for divideby-zero and unaligned memory accesses.
▪ The System Handler Priority Registers SHP control the exception priority.
▪ The System Handler Control and State Register SHCSR enables the system handlers, and indicates he
pending status of the BusFault, MemManage fault, and SVC exceptions.

MemManage Status Register (MMFSR)
The MemManage fault status register (MMFSR) indicates a memory access violation detected by the Memory
Protection Unit (MPU). Privileged access permitted only. Unprivileged accesses generate a BusFault.

MemManage Address Register (MMFAR)
The BFAR address is associated with a precise data access BusFault. Privileged access permitted only.
Unprivileged accesses generate a BusFault.

BusFault Status Register (BFSR)
The BusFault Status Register shows the status of bus errors resulting from instruction fetches and data accesses
and indicates memory access faults detected during a bus operation. Only privileged access is permitted.
Unprivileged access will generate a BusFault.

BusFault Address Register (BFAR)
The BFAR address is associated with a precise data access BusFault. Privileged access permitted only.
Unprivileged accesses generate a BusFault.

Implementing fault handlers实现异常处理

启动文件

二。代码分析

异常调转上下文分析

手动开启一个PendSV 异常，记录上下文切换前的 上下文状态

在进入PendSV 前的状态
PC为当前程序运行位置为0x08005174
SP 为当前栈地址 0x200021B0 与MSP地址相同。说明使用的是主栈
mode 为 Theard mode
Stack MSP
R0~R15寄存器如上图所示
如果发生PendSV 异常
异常标志置位，切换到 Handler mode，硬件会主动入栈
顺序如下 最先入栈的是xPSR 最后是R0，这部分由硬件完成

但是 我们CPU的寄存器是R0~R15 剩下没有入栈的寄存器怎么办，这个由我们的编译器来做。编译器可以根据异常处理中使用的寄存器来进行保存，或者全部剩下的都保存，反正这是C编译器的特性。
当前栈位置为21b0 ,cortex m内核栈的生长方向为高地址向低地址，所以后面的入栈地址都是小于21b0.

调转到PendSV Handler

首先XPSR寄存器变化，Mode 切换为Handler 表示进入到异常处理函数(当然这些标志可以通过相应寄存器状态判断MDK帮我们查找了)
MSP 指针由于入栈的关系发生了变化，指向最后一个入栈的R0寄存器。
倒数低7入栈的是PC 5174 所以我们在0x20002148 往后数7的地址单元上看到了上个PC的位置0x08005174
LR 寄存器为子函数返回值，这边不用关注。
当执行完成PendSV的时候，从MSP指针位置 0x20002148 开始依照队形出栈。

这里可以看到 R0~R14回复到了加入PendSV前的状态。
但是内存0x20002148的内容被更改没有恢复原状态，所以出栈执行后只做了栈指针的移动，栈空间的内容是不会发生变化。
所以栈空间溢出检查思路由此诞生，这里不多提。

也就是说如果发生同步异常，我们在栈的相应位置就可以找到调转前的PC指针位置，从而找到出是哪条指令触发了异常。

1.在汇编中找到0x080005174指令位置
2.C文件中的代码就可以看到了
3.PC代表当前位置，所以上一条是触发异常的指令
可以看到是 SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; 这条语句触发了异常，从而定义出异常位置。

所以
分析异常 如果跳入了硬件异常需要分析的话
1.记录各个异常状态位
2.分析栈内容，从而找到PC，寻找到异常发生点。
MDK也帮我们做了这件事，如下所示 show caller code