1.在全英文路径下创建如下2个文件
源文件:decode38.v
module decode_38(
keyin,
led,
clk
);
input clk;
input [2:0]keyin;
output [7:0]led;
reg [2:0]read_key;
reg [7:0]led;
always@(keyin)
begin
read_key=keyin;
case(read_key)
3'd0: led=8'b1111_1110;
3'd1: led=8'b1111_1101;
3'd2: led=8'b1111_1011;
3'd3: led=8'b1111_0111;
3'd4: led=8'b1110_1111;
3'd5: led=8'b1101_1111;
3'd6: led=8'b1011_1111;
3'd7: led=8'b0111_1111;
default:
led=8'b1111_1111;
endcase
end
endmodule
testbench文件:decode38.vt
`timescale 1 ns/ 1 ps
module decode_38_vlg_tst();
reg clk;
reg [2:0] keyin;
// wires
wire [7:0] led;
reg [3:0]invect;
initial
begin
#10 clk=1'b0;
forever
#10 clk=~clk;
end
initial
begin
for(invect=0;invect<8;invect=invect+1)
begin
keyin=invect[3:0];
#10 $display($time," clk=%b,keyin=%b,led=%b",clk,keyin,led);
end
end
initial
begin
#120 $stop;
end
decode_38 i1 (
.clk(clk),
.keyin(keyin),
.led(led)
);
endmodule
2.参考文章
(138条消息) Modelsim仿真过程(完整版)_sunlinyi66的博客-CSDN博客_modelsim
3.仿真结果
4.二进制显示
在需要显示十进制的信号处,右键,选择radix