为verilator程序编写makefile

1. 文件来源

以our_OnOff.v和main.cpp文件为例，编写Makefile文件，并在ysyx架构中用verilator软件仿真

verilator的第一个程序，注意流程和命令_狮子座硅农（Leo ICer）的博客-CSDN博客

2. Makefile 

# @echo "Write this Makefile by your self."
# VSRC = $(wildcard ./vsrc/*.v)
# CSRC = $(wildcard ./csrc/*.cpp)
VSRC = $(wildcard ./vsrc/our_OnOff.v)
CSRC = $(wildcard ./csrc/main.cpp)
all:
	@echo "Write this Makefile by your self."

sim:
	$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
	verilator -Wno-fatal $(VSRC) $(CSRC) --top-module our_OnOff --cc --trace --exe
	make -C obj_dir -f Vour_OnOff.mk Vour_OnOff
	./obj_dir/Vour_OnOff
	# gtkwave wave.vcd

 .PHONY:clean
clean:
	rm -rf obj_dir wave.vcd	

 3.工程结构