VHDL实验1：对浮点型乘法器的验证(2)

对上一篇浮点型乘法器

VHDL实验：浮点型乘法器及分步代码_卡拉迪亚的曙光的博客-CSDN博客Floating-Point Multiplication，浮点型乘法器https://blog.csdn.net/qq774007409/article/details/121884747

进行验证，给定了10个数据如下：

00000000
3e9e377a
25a00002
3f4f1bbd
25400003
3f800000
a5e00002
3f4f1bbd
a6900000
3e9e377a

对这十个数据进行平方运算，得到的结果应为：

00000000        
3dc3910d
0bc80005
3f278ddf
0b100005
3f800000
0c440004
3f278ddf
0da20000
3dc3910d

testbench 程序如下：

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
 
ENTITY FP_mul_tb IS
END FP_mul_tb;
 
ARCHITECTURE behavior OF FP_mul_tb IS 
 
    -- Component Declaration for the Unit Under Test (UUT)
 
    COMPONENT FPmul
    PORT(
         FP_A : IN  std_logic_vector(31 downto 0);
         FP_B : IN  std_logic_vector(31 downto 0);
         clk : IN  std_logic;
         FP_Z : OUT  std_logic_vector(31 downto 0)
        );
    END COMPONENT;
    

   --Inputs
   signal FP_A : std_logic_vector(31 downto 0) := (others => '0');
   signal FP_B : std_logic_vector(31 downto 0) := (others => '0');
   signal clk : std_logic := '0';

 	--Outputs
   signal FP_Z : std_logic_vector(31 downto 0);

   -- Clock period definitions
   constant clk_period : time := 10 ns;
 
BEGIN
 
	-- Instantiate the Unit Under Test (UUT)
   uut: FPmul PORT MAP (
          FP_A => FP_A,
          FP_B => FP_B,
          clk => clk,
          FP_Z => FP_Z
        );

   -- Clock process definitions
   clk_process :process
   begin
		clk <= '0';
		wait for clk_period/2;
		clk <= '1';
		wait for clk_period/2;
   end process;
 

   -- Stimulus process
   stim_proc: process
   begin		
      -- hold reset state for 100 ns.
      wait for 100 ns;	

      wait for clk_period*10;

      -- insert stimulus here
		--00000000
		FP_A <="00000000000000000000000000000000";
        FP_B <="00000000000000000000000000000000";
      wait for 100 ns;
		--3e9e377a
		FP_A <="00111110100111100011011101111010";
        FP_B <="00111110100111100011011101111010";
      wait for 100 ns;
		--25a00002
		FP_A <="00100101101000000000000000000010";
        FP_B <="00100101101000000000000000000010";
      wait for 100 ns;
		--3f4f1bbd
		FP_A <="00111111010011110001101110111101";
        FP_B <="00111111010011110001101110111101";
      wait for 100 ns;
		--25400003
		FP_A <="00100101010000000000000000000011";
        FP_B <="00100101010000000000000000000011";
      wait for 100 ns;
		--3f800000
		FP_A <="00111111100000000000000000000000";
        FP_B <="00111111100000000000000000000000";
      wait for 100 ns;
		--a5e00002
		FP_A <="10100101111000000000000000000010";
        FP_B <="10100101111000000000000000000010";
      wait for 100 ns;
		--3f4f1bbd
		FP_A <="00111111010011110001101110111101";
        FP_B <="00111111010011110001101110111101";
      wait for 100 ns;
		--a6900000
		FP_A <="10100110100100000000000000000000";
        FP_B <="10100110100100000000000000000000";
      wait for 100 ns;
		--3e9e377a
		FP_A <="00111110100111100011011101111010";
        FP_B <="00111110100111100011011101111010";
      wait for 100 ns;
		
	    wait;
   end process;
	
	
END;

进行simulation后的波形为：

 可以看到FP_Z的结果与上面显示的一致，浮点型乘法器实现。