HDLbits Count clock

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HDLbits Count clock

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自己写的，发出来让大家看看有啥bug，评论区希望大家指出！

Create a set of counters suitable for use as a 12-hour clock (with am/pm indicator). Your counters are clocked by a fast-running clk, with a pulse on ena whenever your clock should increment (i.e., once per second).

reset resets the clock to 12:00 AM. pm is 0 for AM and 1 for PM. hh, mm, and ss are two BCD (Binary-Coded Decimal) digits each for hours (01-12), minutes (00-59), and seconds (00-59). Reset has higher priority than enable, and can occur even when not enabled.

The following timing diagram shows the rollover behaviour from 11:59:59 AM to 12:00:00 PM and the synchronous reset and enable behaviour.

module top_module(
    input clk,
    input reset,
    input ena,
    output pm,
    output [7:0] hh,
    output [7:0] mm,
    output [7:0] ss); 
//hour的增加模块
    always@(posedge clk)begin
        if(reset) hh<=8'h12;
        else if(ena==1&&hh[3:0]<9&&hh<8'h12&&(mm==8'h59&&ss==8'h59))hh<=hh+1;//判断分和秒到达59、小时hour小于12时允许增加
        else if(ena==1&&hh[3:0]==9&&(mm==8'h59&&ss==8'h59))begin hh[7:4]<=hh[7:4]+1;hh[3:0]<=0;end//判断分和秒到达59、小时hour低位等于9时允许增加高位
        else if(ena==1&&hh[7:4]==1&&hh[3:0]==2&&(mm==8'h59&&ss==8'h59)) hh<=8'b1;//判断最终复位条件
        else hh<=hh;
    end
//minutes的增加模块
    always@(posedge clk)begin
        if(reset) mm<=8'b0;
        else if(ena==1&&mm[3:0]<9&&mm<8'h59&&ss==8'h59)mm<=mm+1;//判断秒到达59、分钟minutes小于59时允许增加
        else if(ena==1&&mm[3:0]==9&&mm<8'h59&&ss==8'h59)begin mm[7:4]<=mm[7:4]+1;mm[3:0]<=0;end//判断秒到达59、分钟minutes低位等于9时允许增加高位
        else if(ena==1&&mm[7:4]==5&&mm[3:0]==9&&ss==8'h59) mm<=8'b0;//判断最终复位条件
        else mm<=mm;
    end
//second的增加模块
    always@(posedge clk)begin
        if(reset) ss<=8'b0;
        else if(ena==1&&ss[3:0]<9&&ss<8'h59)ss<=ss+1;//秒second按时钟增加
        else if(ena==1&&ss[3:0]==9&&ss<8'h59)begin ss[7:4]<=ss[7:4]+1;ss[3:0]<=0;end//秒低位增加到9，秒高位加1，second按时钟增加
        else if(ena==1&&ss[7:4]==5&&ss[3:0]==9) ss<=8'b0;//判断最终复位条件
        else ss<=ss;
    end
//pm的指示变化模块
    always@(posedge clk)begin
        if(reset) pm<=0;
        else if(hh==8'h11&&mm==8'h59&&ss==8'h59)pm<=~pm;
        else pm<=pm;
    end
endmodule