FPGA烧写SPI FLASH

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作者：ShownSun
工作室：时沿科技

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FPGA烧写SPI FLASH

方法一

1.点击setting，选择bitstream部分，将bin_file打钩，点击OK
2.点击generate bitstream，生成bit文件与bin文件
3.点击open hardware manager，连接板子
4.选中xc7k325t，右击选择add configuration memory device
5.选择开发板上的flash芯片，点击ok
6.添加bin文件，点击ok即可烧录代码到flash

方法二

1.在synthesis之后添加必要的的flash约束指令,依次执行implentation与generate bitstream，生成bit文件
2.通过Tcl Console进入bit所在的目录（在runs里面的impl中），输入cd + 目录位置
3.输入指令：
	write_cfgmem -format mcs -interface spix4 -size 128 -loadbit "up 0 E:/x.bit" -file  x.mcs
	write_cfgmem -size 16 -interface spix1 -format mcs -force -loadbit "up 0 ./top.bit" top.mcs
	write_cfgmem -size 128 -interface spix4 -format mcs -force -loadbit "up 0 ./system_top.bit" system_top.mcs
4.选中xc7k325t，右击选择add configuration memory device
5.选择开发板上的flash芯片，点击ok
6.添加mcs与prm文件，点击ok即可烧录代码到flash

SPI flash的约束

以下为针对博兰锐思主板M7的N25Q128A13BSF40E SPI flash进行的约束
	set_property CFGBVS VCCO [current_design]
	set_property CONFIG_VOLTAGE 3.3 [current_design]
	set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
	set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
	set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
	set_property BITSTREAM.CONFIG.SPI_FALL_EDGE Yes [current_design]
注意：
	CFGBVS为VCCO 或者GND
	CONFIG_VOLTAGE为 1.8/2.4/2.5/3.3

BPI FLASH的约束

以下为针对VC707的 PC28F00AG18FE BPI flash进行的约束
	set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
	set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type1 [current_design]
	set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN div-1 [current_design]
	set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
	set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
	set_property CONFIG_MODE BPI16 [current_design]
	set_property CFGBVS GND [current_design]
	set_property CONFIG_VOLTAGE 1.8 [current_design]