20230410在CV1826平台匹配PAG7920摄像头
2023/4/10 21:41
摄像头：PAG7920LT_DS
PixArt Imageing Inc.
1、修改I2C2的GPIO引脚：
Z:\cv1823\smartpen\build\boards\cv1826_wevb_0005a\u-boot\cvi_board_init.c
// set tp, i2c2 and reset irq
PINMUX_CONFIG(VIVO_D8, IIC2_SCL);
PINMUX_CONFIG(VIVO_D7, IIC2_SDA);
修改为：
// set tp, i2c2 and reset irq
//PINMUX_CONFIG(VIVO_D8, IIC2_SCL);
//PINMUX_CONFIG(VIVO_D7, IIC2_SDA);
PINMUX_CONFIG(PAD_MIPI_TXP1, IIC2_SCL);
PINMUX_CONFIG(PAD_MIPI_TXM1, IIC2_SDA);
printf("-------------------1----------------------\n");
//sc7a20
//PINMUX_CONFIG(IIC2_SDA, PWR_GPIO_13);
2、在内核中导入：
Z:\cv1823\smartpen\build\boards\cv1826_wevb_0005a\.config
#
# Sensor settings
#
CONFIG_SENSOR_OV_OV7750=y
CONFIG_SENSOR_OV_OV7251=y
CONFIG_SENSOR_PIXART_PAG7920=y
CONFIG_SENSOR_SMS_SC035GS=y
CONFIG_SENSOR_SMS_SC035GS_1L=y
CONFIG_SENSOR_GCORE_GC2053_1L=y
3、
Z:\cv1823\smartpen\build\sensors\sensor_list.json
{
"sensor_list": [
"GCORE_GC2053",
"GCORE_GC2053_1L",
"GCORE_GC2053_SLAVE",
"GCORE_GC2093",
"GCORE_GC2093_SLAVE",
"GCORE_GC4653",
"GCORE_GC1054",
"NEXTCHIP_N5",
"NEXTCHIP_N6",
"OV_OV7251",
"OV_OV7750",
"OV_OS08A20",
"OV_OS08A20_SLAVE",
"PICO_384",
"PICO_640",
"PIXART_PAG7920",
"PIXELPLUS_PR2020",
"PIXELPLUS_PR2100",
"SMS_SC035GS",
"SMS_SC035GS_1L",
"SMS_SC200AI",
"SMS_SC3335",
"SMS_SC3335_SLAVE",
4、驱动程序：
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\pixart_pag7920\Makefile
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\pixart_pag7920\pag7920_cmos.c
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\pixart_pag7920\pag7920_cmos_ex.h
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\pixart_pag7920\pag7920_cmos_param.h
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\pixart_pag7920\pag7920_sensor_ctl.c
5、
Z:\cv1823\smartpen\middleware\component\isp\sensor\cv182x\Makefile
ov_os08a20:
$(call MAKE_SENSOR, ${@})
ov_ov7251:
$(call MAKE_SENSOR, ${@})
ov_ov7750:
$(call MAKE_SENSOR, ${@})
pixart_pag7920:
$(call MAKE_SENSOR, ${@})
soi_f35:
$(call MAKE_SENSOR, ${@})
sony_imx327:
$(call MAKE_SENSOR, ${@})
6、
Z:\cv1823\smartpen\middleware\component\isp\sensor.mk
sensor-$(CONFIG_SENSOR_NEXTCHIP_N5) += nextchip_n5
sensor-$(CONFIG_SENSOR_NEXTCHIP_N6) += nextchip_n6
sensor-$(CONFIG_SENSOR_OV_OS08A20) += ov_os08a20
sensor-$(CONFIG_SENSOR_OV_OV7251) += ov_ov7251
sensor-$(CONFIG_SENSOR_OV_OV7750) += ov_ov7750
sensor-$(CONFIG_SENSOR_PIXART_PAG7920) += pixart_pag7920
sensor-$(CONFIG_SENSOR_PIXELPLUS_PR2020) += pixelplus_pr2020
sensor-$(CONFIG_SENSOR_PIXELPLUS_PR2100) += pixelplus_pr2100
7、
Z:\cv1823\smartpen\middleware\include\cvi_sns_ctrl.h
extern ISP_SNS_OBJ_S stSnsOs08a20_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsOv7251_Obj;
extern ISP_SNS_OBJ_S stSnsOv7750_Obj;
extern ISP_SNS_OBJ_S stSnsF23_Obj;
extern ISP_SNS_OBJ_S stSnsF35_Obj;
extern ISP_SNS_OBJ_S stSnsF35_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsH65_Obj;
extern ISP_SNS_OBJ_S stSnsImx327_2l_Obj;
extern ISP_SNS_OBJ_S stSnsImx290_2l_Obj;
extern ISP_SNS_OBJ_S stSnsImx327_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsImx327_Sublvds_Obj;
extern ISP_SNS_OBJ_S stSnsImx307_Obj;
extern ISP_SNS_OBJ_S stSnsImx307_2l_Obj;
extern ISP_SNS_OBJ_S stSnsImx307_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsPICO640_Obj;
extern ISP_SNS_OBJ_S stSnsPICO384_Obj;
extern ISP_SNS_OBJ_S stSnsImx307_Sublvds_Obj;
extern ISP_SNS_OBJ_S stSnsMCS369Q_Obj;
extern ISP_SNS_OBJ_S stSnsMM308M2_Obj;
extern ISP_SNS_OBJ_S stSnsN5_Obj;
extern ISP_SNS_OBJ_S stSnsSC3335_Obj;
extern ISP_SNS_OBJ_S stSnsSC3335_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsImx335_Obj;
extern ISP_SNS_OBJ_S stSnsPR2020_Obj;
extern ISP_SNS_OBJ_S stSnsPR2100_Obj;
extern ISP_SNS_OBJ_S stSnsImx334_Obj;
extern ISP_SNS_OBJ_S stSnsSC8238_Obj;
extern ISP_SNS_OBJ_S stSnsMCS369_Obj;
extern ISP_SNS_OBJ_S stSnsSC4210_Obj;
extern ISP_SNS_OBJ_S stSnsSC200AI_Obj;
extern ISP_SNS_OBJ_S stSnsN6_Obj;
extern ISP_SNS_OBJ_S stSnsGc2053_Obj;
extern ISP_SNS_OBJ_S stSnsGc2053_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsGc2093_Obj;
extern ISP_SNS_OBJ_S stSnsGc2093_Slave_Obj;
extern ISP_SNS_OBJ_S stSnsGc4653_Obj;
extern ISP_SNS_OBJ_S stSnsGc1054_Obj;
extern ISP_SNS_OBJ_S stSnsImx347_Obj;
extern ISP_SNS_OBJ_S stSnsImx385_Obj;
extern ISP_SNS_OBJ_S stSnsGc2053_1l_Obj;
extern ISP_SNS_OBJ_S stSnsSC035HGS_Obj;
extern ISP_SNS_OBJ_S stSnsSC500AI_Obj;
extern ISP_SNS_OBJ_S stSnsSC501AI_2L_Obj;
extern ISP_SNS_OBJ_S stSnsSC035GS_Obj;
extern ISP_SNS_OBJ_S stSnsSC035GS_1L_Obj;
extern ISP_SNS_OBJ_S stSnsSC401AI_Obj;
extern ISP_SNS_OBJ_S stSnsTP2850_Obj;
extern ISP_SNS_OBJ_S stSnsPag7920_Obj;
#define CMOS_CHECK_POINTER(ptr)\
8、
Z:\cv1823\smartpen\middleware\sample\common\Kbuild
ifeq ($(CONFIG_SENSOR_OV_OS08A20_SLAVE), y)
KBUILD_DEFINES += -DSENSOR_OV_OS08A20_SLAVE
endif
ifeq ($(CONFIG_SENSOR_OV_OV7251), y)
KBUILD_DEFINES += -DSENSOR_OV_OV7251
endif
ifeq ($(CONFIG_SENSOR_OV_OV7750), y)
KBUILD_DEFINES += -DSENSOR_OV_OV7750
endif
ifeq ($(CONFIG_SENSOR_PIXART_PAG7920), y)
KBUILD_DEFINES += -DSENSOR_PIXART_PAG7920
endif
ifeq ($(CONFIG_SENSOR_PICO_384), y)
KBUILD_DEFINES += -DSENSOR_PICO_384
endif
9、
Z:\cv1823\smartpen\middleware\sample\common\sample_comm.h
/*******************************************************
* enum define
*******************************************************/
typedef enum _PIC_SIZE_E {
PIC_CIF,
PIC_D1_PAL, /* 720 * 576 */
PIC_D1_NTSC, /* 720 * 480 */
PIC_720P, /* 1280 * 720 */
PIC_1080P, /* 1920 * 1080 */
PIC_1088, /* 1920 * 1088 */
PIC_1440P, /* 2560 * 1440 */
PIC_2304x1296,
PIC_2560x1600,
PIC_2592x1520,
PIC_2592x1536,
PIC_2592x1944,
PIC_2688x1520,
PIC_2716x1524,
PIC_2880x1620,
PIC_3844x1124,
PIC_3840x2160,
PIC_4096x2160,
PIC_3000x3000,
PIC_4000x3000,
PIC_3840x8640,
PIC_7688x1124,
PIC_640x480,
PIC_479P, /* 632 * 479 */
PIC_288P, /* 384 * 288 */
PIC_240P,
PIC_CUSTOMIZE,
PIC_BUTT
} PIC_SIZE_E;
typedef enum _SAMPLE_SNS_TYPE_E {
/* ------ LINEAR BEGIN ------*/
SONY_IMX290_MIPI_1M_30FPS_12BIT,
SONY_IMX290_MIPI_2M_60FPS_12BIT,
#ifdef FPGA_PORTING
SONY_IMX327_MIPI_1M_30FPS_10BIT,
#endif
SONY_IMX327_MIPI_2M_30FPS_12BIT,
SONY_IMX307_MIPI_2M_30FPS_12BIT,
SONY_IMX327_2L_MIPI_2M_30FPS_12BIT,
SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT,
SONY_IMX307_2L_MIPI_2M_30FPS_12BIT,
SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT,
OV_OS08A20_MIPI_8M_30FPS_10BIT,
OV_OS08A20_MIPI_5M_30FPS_10BIT,
OV_OS08A20_MIPI_4M_30FPS_10BIT,
OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT,
OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT,
OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT,
OV_OV7251_MIPI_480P_100FPS_10BIT,
OV_OV7750_MIPI_480P_100FPS_10BIT,
SOI_F23_MIPI_2M_30FPS_10BIT,
SOI_F35_MIPI_2M_30FPS_10BIT,
SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT,
SOI_H65_MIPI_1M_30FPS_10BIT,
PICO640_THERMAL_479P,
PIXART_PAG7920_MIPI_240P_100FPS_10BIT,
PICO384_THERMAL_384X288,
SONY_IMX327_SUBLVDS_2M_30FPS_12BIT,
SONY_IMX307_SUBLVDS_2M_30FPS_12BIT,
VIVO_MCS369Q_4M_30FPS_12BIT,
VIVO_MM308M2_2M_25FPS_8BIT,
NEXTCHIP_N5_2M_25FPS_8BIT,
SMS_SC3335_MIPI_3M_30FPS_10BIT,
SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT,
SONY_IMX335_MIPI_5M_30FPS_12BIT,
SONY_IMX335_MIPI_4M_30FPS_12BIT,
SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT,
PIXELPLUS_PR2020_1M_25FPS_8BIT,
SONY_IMX385_MIPI_2M_30FPS_12BIT,
PIXELPLUS_PR2020_1M_30FPS_8BIT,
PIXELPLUS_PR2020_2M_25FPS_8BIT,
PIXELPLUS_PR2020_2M_30FPS_8BIT,
PIXELPLUS_PR2100_2M_25FPS_8BIT,
PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT,
PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT,
SONY_IMX334_MIPI_8M_30FPS_12BIT,
SMS_SC8238_MIPI_8M_30FPS_10BIT,
VIVO_MCS369_2M_30FPS_12BIT,
SMS_SC4210_MIPI_4M_30FPS_12BIT,
SMS_SC200AI_MIPI_2M_30FPS_10BIT,
NEXTCHIP_N6_2M_4CH_25FPS_8BIT,
NEXTCHIP_N5_1M_2CH_25FPS_8BIT,
GCORE_GC2053_MIPI_2M_30FPS_10BIT,
GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT,
GCORE_GC2093_MIPI_2M_30FPS_10BIT,
GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT,
GCORE_GC4653_MIPI_4M_30FPS_10BIT,
SONY_IMX335_MIPI_5M_60FPS_10BIT,
SONY_IMX335_MIPI_4M_60FPS_10BIT,
GCORE_GC1054_MIPI_1M_30FPS_10BIT,
SONY_IMX327_MIPI_2M_60FPS_12BIT,
SONY_IMX347_MIPI_4M_60FPS_12BIT,
SONY_IMX307_SUBLVDS_2M_60FPS_12BIT,
SONY_IMX307_MIPI_2M_60FPS_12BIT,
GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT,
SONY_IMX335_MIPI_2M_60FPS_10BIT,
SMS_SC035HGS_MIPI_480P_120FPS_12BIT,
SMS_SC500AI_MIPI_5M_30FPS_10BIT,
SMS_SC500AI_MIPI_4M_30FPS_10BIT,
SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT,
SMS_SC401AI_MIPI_4M_30FPS_10BIT,
SMS_SC035GS_MIPI_480P_120FPS_12BIT,
SMS_SC035GS_1L_MIPI_480P_100FPS_10BIT,
/* ------ LINEAR END ------*/
SAMPLE_SNS_TYPE_LINEAR_BUTT,
/* ------ WDR 2TO1 BEGIN ------*/
SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1 = SAMPLE_SNS_TYPE_LINEAR_BUTT,
#ifdef FPGA_PORTING
SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1,
#endif
SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1,
OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1,
OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1,
OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1,
OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1,
OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1,
OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1,
SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1,
SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1,
SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1,
SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1,
SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1,
SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1,
SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1,
SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1,
SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1,
SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1,
SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1,
GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1,
GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1,
SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1,
SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1,
SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1,
/* ------ WDR 2TO1 END ------*/
SAMPLE_SNS_TYPE_BUTT,
} SAMPLE_SNS_TYPE_E;
10、
Z:\cv1823\smartpen\middleware\sample\common\sample_common_isp.c
ISP_PUB_ATTR_S ISP_PUB_ATTR_OS08A20_8M_30FPS = { { 0, 0, 3840, 2160 }, { 3840, 2160 },
25, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_OS08A20_5M_30FPS = { { 0, 0, 2592, 1944 }, { 2592, 1944 },
25, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_OS08A20_4M_30FPS = { { 0, 0, 2560, 1440 }, { 2560, 1440 },
25, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_OV7251_480P_100FPS = { { 0, 0, 640, 480 }, { 640, 480 },
100, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_OV7750_480P_100FPS = { { 0, 0, 640, 480 }, { 640, 480 },
100, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_PICO_640 = { { 0, 0, 632, 479 }, { 632, 479 },
25, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_PAG7920_240P_100FPS = { { 0, 0, 320, 240 }, { 320, 240 },
100, BAYER_BGGR, WDR_MODE_NONE, 0};
ISP_PUB_ATTR_S ISP_PUB_ATTR_PICO_384 = { { 0, 0, 384, 288 }, { 384, 288 },
25, BAYER_BGGR, WDR_MODE_NONE, 0};
case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstPubAttr, &ISP_PUB_ATTR_OS08A20_4M_30FPS, sizeof(ISP_PUB_ATTR_S));
pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE;
break;
case OV_OV7251_MIPI_480P_100FPS_10BIT:
memcpy(pstPubAttr, &ISP_PUB_ATTR_OV7251_480P_100FPS, sizeof(ISP_PUB_ATTR_S));
break;
case OV_OV7750_MIPI_480P_100FPS_10BIT:
memcpy(pstPubAttr, &ISP_PUB_ATTR_OV7750_480P_100FPS, sizeof(ISP_PUB_ATTR_S));
break;
case PIXART_PAG7920_MIPI_240P_100FPS_10BIT:
memcpy(pstPubAttr, &ISP_PUB_ATTR_PAG7920_240P_100FPS, sizeof(ISP_PUB_ATTR_S));
break;
case PICO640_THERMAL_479P:
memcpy(pstPubAttr, &ISP_PUB_ATTR_PICO_640, sizeof(ISP_PUB_ATTR_S));
break;
#if defined(SENSOR_OV_OS08A20_SLAVE)
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
pSnsObj = &stSnsOs08a20_Slave_Obj;
break;
#endif
#if defined(SENSOR_OV_OV7251)
case OV_OV7251_MIPI_480P_100FPS_10BIT:
pSnsObj = &stSnsOv7251_Obj;
break;
#endif
#if defined(SENSOR_OV_OV7750)
case OV_OV7750_MIPI_480P_100FPS_10BIT:
pSnsObj = &stSnsOv7750_Obj;
break;
#endif
#if defined(SENSOR_PICO_640)
case PICO640_THERMAL_479P:
pSnsObj = &stSnsPICO640_Obj;
break;
#endif
#if defined(SENSOR_PICO_384)
case PICO384_THERMAL_384X288:
pSnsObj = &stSnsPICO384_Obj;
break;
#endif
#if defined(SENSOR_SONY_IMX327_SUBLVDS)
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
pSnsObj = &stSnsImx327_Sublvds_Obj;
break;
#endif
#if defined(SENSOR_SONY_IMX307_SUBLVDS)
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
/* fallthrough */
case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
pSnsObj = &stSnsImx307_Sublvds_Obj;
break;
#endif
#if defined(SENSOR_VIVO_MCS369Q)
case VIVO_MCS369Q_4M_30FPS_12BIT:
pSnsObj = &stSnsMCS369Q_Obj;
break;
#endif
#if defined(SENSOR_VIVO_MCS369)
case VIVO_MCS369_2M_30FPS_12BIT:
pSnsObj = &stSnsMCS369_Obj;
break;
#endif
#if defined(SENSOR_VIVO_MM308M2)
case VIVO_MM308M2_2M_25FPS_8BIT:
pSnsObj = &stSnsMM308M2_Obj;
break;
#endif
#if defined(SENSOR_NEXTCHIP_N5)
case NEXTCHIP_N5_2M_25FPS_8BIT:
case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
pSnsObj = &stSnsN5_Obj;
break;
#endif
#if defined(SENSOR_NEXTCHIP_N6)
case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
pSnsObj = &stSnsN6_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC3335)
case SMS_SC3335_MIPI_3M_30FPS_10BIT:
pSnsObj = &stSnsSC3335_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC3335_SLAVE)
case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
pSnsObj = &stSnsSC3335_Slave_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC200AI)
case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
pSnsObj = &stSnsSC200AI_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC500AI)
case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
/* fallthrough */
case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
/* fallthrough */
case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
pSnsObj = &stSnsSC500AI_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC501AI_2L)
case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
pSnsObj = &stSnsSC501AI_2L_Obj;
break;
#endif
#if defined(SENSOR_SMS_SC401AI)
case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
pSnsObj = &stSnsSC401AI_Obj;
break;
#endif
#if defined(SENSOR_SONY_IMX334)
case SONY_IMX334_MIPI_8M_30FPS_12BIT:
case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
pSnsObj = &stSnsImx334_Obj;
break;
#endif
#if defined(SENSOR_SONY_IMX335)
case SONY_IMX335_MIPI_5M_30FPS_12BIT:
case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_4M_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_5M_60FPS_10BIT:
case SONY_IMX335_MIPI_4M_60FPS_10BIT:
case SONY_IMX335_MIPI_2M_60FPS_10BIT:
pSnsObj = &stSnsImx335_Obj;
break;
#endif
#if defined(SENSOR_SONY_IMX385)
case SONY_IMX385_MIPI_2M_30FPS_12BIT:
case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
pSnsObj = &stSnsImx385_Obj;
break;
#endif
#if defined(SENSOR_PIXART_PAG7920)
case PIXART_PAG7920_MIPI_240P_100FPS_10BIT:
pSnsObj = &stSnsPag7920_Obj;
break;
#endif
#if defined(SENSOR_PIXELPLUS_PR2020)
case PIXELPLUS_PR2020_1M_25FPS_8BIT:
case PIXELPLUS_PR2020_1M_30FPS_8BIT:
case PIXELPLUS_PR2020_2M_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_30FPS_8BIT:
pSnsObj = &stSnsPR2020_Obj;
break;
#endif
11、
Z:\cv1823\smartpen\middleware\sample\common\sample_common_vi.c
VI_DEV_ATTR_S DEV_ATTR_PAG7920_240P_BASE = {
VI_MODE_MIPI,
VI_WORK_MODE_1Multiplex,
VI_SCAN_PROGRESSIVE,
{-1, -1, -1, -1},
VI_DATA_SEQ_YUYV,
{
/*port_vsync port_vsync_neg port_hsync port_hsync_neg */
VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH,
VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH,
/*hsync_hfb hsync_act hsync_hhb*/
{0, 320, 0,
/*vsync0_vhb vsync0_act vsync0_hhb*/
0, 240, 0,
/*vsync1_vhb vsync1_act vsync1_hhb*/
0, 0, 0}
},
VI_DATA_TYPE_RGB,
{320, 240},
{
WDR_MODE_NONE,
240
},
.enBayerFormat = BAYER_FORMAT_BG,
};
VI_DEV_ATTR_S DEV_ATTR_OV7251_480P_BASE = {
VI_MODE_MIPI,
VI_WORK_MODE_1Multiplex,
VI_SCAN_PROGRESSIVE,
{-1, -1, -1, -1},
VI_DATA_SEQ_YUYV,
{
/*port_vsync port_vsync_neg port_hsync port_hsync_neg */
VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH,
VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH,
/*hsync_hfb hsync_act hsync_hhb*/
{0, 640, 0,
/*vsync0_vhb vsync0_act vsync0_hhb*/
0, 480, 0,
/*vsync1_vhb vsync1_act vsync1_hhb*/
0, 0, 0}
},
VI_DATA_TYPE_RGB,
{640, 480},
{
WDR_MODE_NONE,
480
},
.enBayerFormat = BAYER_FORMAT_BG,
};
VI_DEV_ATTR_S DEV_ATTR_OV7750_480P_BASE = {
VI_MODE_MIPI,
VI_WORK_MODE_1Multiplex,
VI_SCAN_PROGRESSIVE,
{-1, -1, -1, -1},
VI_DATA_SEQ_YUYV,
{
/*port_vsync port_vsync_neg port_hsync port_hsync_neg */
VI_VSYNC_PULSE, VI_VSYNC_NEG_LOW, VI_HSYNC_VALID_SINGNAL, VI_HSYNC_NEG_HIGH,
VI_VSYNC_VALID_SIGNAL, VI_VSYNC_VALID_NEG_HIGH,
/*hsync_hfb hsync_act hsync_hhb*/
{0, 640, 0,
/*vsync0_vhb vsync0_act vsync0_hhb*/
0, 480, 0,
/*vsync1_vhb vsync1_act vsync1_hhb*/
0, 0, 0}
},
VI_DATA_TYPE_RGB,
{640, 480},
{
WDR_MODE_NONE,
480
},
.enBayerFormat = BAYER_FORMAT_BG,
};
VI_CHN_ATTR_S CHN_ATTR_640x480_420_SDR8_LINEAR = {
{640, 480},
PIXEL_FORMAT_YUV_PLANAR_420,
DYNAMIC_RANGE_SDR8,
VIDEO_FORMAT_LINEAR,
COMPRESS_MODE_NONE,
CVI_FALSE, CVI_FALSE,
0,
{ -1, -1}
};
VI_CHN_ATTR_S CHN_ATTR_320x240_420_SDR8_LINEAR = {
{320, 240},
PIXEL_FORMAT_YUV_PLANAR_420,
DYNAMIC_RANGE_SDR8,
VIDEO_FORMAT_LINEAR,
COMPRESS_MODE_NONE,
CVI_FALSE, CVI_FALSE,
0,
{ -1, -1}
};
/*
* Brief: get picture size(w*h), according enPicSize
*/
CVI_S32 SAMPLE_COMM_SYS_GetPicSize(PIC_SIZE_E enPicSize, SIZE_S *pstSize)
{
switch (enPicSize) {
case PIC_CIF: /* 352 * 288 */
pstSize->u32Width = 352;
pstSize->u32Height = 288;
break;
case PIC_D1_PAL: /* 720 * 576 */
pstSize->u32Width = 720;
pstSize->u32Height = 576;
break;
case PIC_D1_NTSC: /* 720 * 480 */
pstSize->u32Width = 720;
pstSize->u32Height = 480;
break;
case PIC_720P: /* 1280 * 720 */
pstSize->u32Width = 1280;
pstSize->u32Height = 720;
break;
case PIC_1080P: /* 1920 * 1080 */
pstSize->u32Width = 1920;
pstSize->u32Height = 1080;
break;
case PIC_1088: /* 1920 * 1088*/
pstSize->u32Width = 1920;
pstSize->u32Height = 1088;
break;
case PIC_1440P: /* 2560 * 1440 */
pstSize->u32Width = 2560;
pstSize->u32Height = 1440;
break;
case PIC_2304x1296:
pstSize->u32Width = 2304;
pstSize->u32Height = 1296;
break;
case PIC_2592x1520:
pstSize->u32Width = 2592;
pstSize->u32Height = 1520;
break;
case PIC_2560x1600:
pstSize->u32Width = 2560;
pstSize->u32Height = 1600;
break;
case PIC_2592x1944:
pstSize->u32Width = 2592;
pstSize->u32Height = 1944;
break;
case PIC_2592x1536:
pstSize->u32Width = 2592;
pstSize->u32Height = 1536;
break;
case PIC_2688x1520:
pstSize->u32Width = 2688;
pstSize->u32Height = 1520;
break;
case PIC_2716x1524:
pstSize->u32Width = 2716;
pstSize->u32Height = 1524;
break;
case PIC_2880x1620:
pstSize->u32Width = 2880;
pstSize->u32Height = 1620;
break;
case PIC_3844x1124:
pstSize->u32Width = 3844;
pstSize->u32Height = 1124;
break;
case PIC_3840x2160:
pstSize->u32Width = 3840;
pstSize->u32Height = 2160;
break;
case PIC_3000x3000:
pstSize->u32Width = 3000;
pstSize->u32Height = 3000;
break;
case PIC_4000x3000:
pstSize->u32Width = 4000;
pstSize->u32Height = 3000;
break;
case PIC_4096x2160:
pstSize->u32Width = 4096;
pstSize->u32Height = 2160;
break;
case PIC_3840x8640:
pstSize->u32Width = 3840;
pstSize->u32Height = 8640;
break;
case PIC_7688x1124:
pstSize->u32Width = 7688;
pstSize->u32Height = 1124;
break;
case PIC_640x480:
pstSize->u32Width = 640;
pstSize->u32Height = 480;
break;
case PIC_479P: /* 632 * 479 */
pstSize->u32Width = 632;
pstSize->u32Height = 479;
break;
case PIC_288P: /* 384 * 288 */
pstSize->u32Width = 384;
pstSize->u32Height = 288;
break;
case PIC_240P: /* 320 * 240 */
pstSize->u32Width = 320;
pstSize->u32Height = 240;
break;
default:
return CVI_FAILURE;
}
return CVI_SUCCESS;
}
CVI_S32 SAMPLE_COMM_VI_GetDevAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_DEV_ATTR_S *pstViDevAttr)
{
switch (enSnsType) {
default:
case SONY_IMX290_MIPI_1M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX297_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
#ifdef FPGA_PORTING
case SONY_IMX327_MIPI_1M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX327_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX327_1M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
#endif
case SONY_IMX327_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_MIPI_2M_60FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX327_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX327_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX307_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_MIPI_2M_60FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX307_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX307_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX334_MIPI_8M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX334_8M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX334_8M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX335_MIPI_5M_30FPS_12BIT:
case SONY_IMX335_MIPI_5M_60FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_5M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_5M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX335_MIPI_4M_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_60FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_1600P_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_4M_1600P_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SONY_IMX335_MIPI_2M_60FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX335_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX385_MIPI_2M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX385_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX385_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case OV_OS08A20_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_8M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_8M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case OV_OS08A20_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_5M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_5M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case OV_OS08A20_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_OS08A20_4M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case OV_OV7251_MIPI_480P_100FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_OV7251_480P_BASE, sizeof(VI_DEV_ATTR_S));
break;
case OV_OV7750_MIPI_480P_100FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_OV7750_480P_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SOI_F23_MIPI_2M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_F23_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SOI_F35_MIPI_2M_30FPS_10BIT:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_F35_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_F35_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SOI_H65_MIPI_1M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_H65_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PICO640_THERMAL_479P:
memcpy(pstViDevAttr, &DEV_ATTR_PICO_640_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PICO384_THERMAL_384X288:
memcpy(pstViDevAttr, &DEV_ATTR_PICO_384_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX327_SUBLVDS_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_IMX307_SUBLVDS_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case VIVO_MCS369Q_4M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MCS369Q_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case VIVO_MCS369_2M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MCS369_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case VIVO_MM308M2_2M_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_VIVO_MM308M2_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case NEXTCHIP_N5_2M_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_NEXTCHIP_N5_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_NEXTCHIP_N6_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_NEXTCHIP_N5_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC3335_MIPI_3M_30FPS_10BIT:
case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC3335_3M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_SC200AI_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_SC500AI_5M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_SC500AI_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC501AI_2L_5M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC401AI_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PIXELPLUS_PR2020_1M_25FPS_8BIT:
case PIXELPLUS_PR2020_1M_30FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2020_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PIXELPLUS_PR2020_2M_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_30FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2020_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PIXELPLUS_PR2100_2M_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2100_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
#ifdef ARCH_CV183X
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2100_2M_2CH_BASE, sizeof(VI_DEV_ATTR_S));
break;
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2100_2M_4CH_BASE, sizeof(VI_DEV_ATTR_S));
break;
#else
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2100_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->enWorkMode = VI_WORK_MODE_2Multiplex;
break;
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PIXELPLUS_PR2100_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->enWorkMode = VI_WORK_MODE_4Multiplex;
break;
#endif
case SMS_SC8238_MIPI_8M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC8238_8M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_SC8238_8M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case SMS_SC4210_MIPI_4M_30FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC4210_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_SC4210_4M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case PIXART_PAG7920_MIPI_240P_100FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_PAG7920_240P_BASE, sizeof(VI_DEV_ATTR_S));
break;
case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_GC2053_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_GC2093_2M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_GC2093_2M_BASE, sizeof(VI_DEV_ATTR_S));
pstViDevAttr->stWDRAttr.enWDRMode = WDR_MODE_2To1_LINE;
break;
case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_GC4653_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_GC1054_1M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SONY_IMX347_MIPI_4M_60FPS_12BIT:
case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
memcpy(pstViDevAttr, &DEV_ATTR_IMX347_4M_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC035HGS_480P_BASE, sizeof(VI_DEV_ATTR_S));
break;
case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
case SMS_SC035GS_1L_MIPI_480P_100FPS_10BIT:
memcpy(pstViDevAttr, &DEV_ATTR_SC035GS_480P_BASE, sizeof(VI_DEV_ATTR_S));
break;
}
return CVI_SUCCESS;
}
CVI_S32 SAMPLE_COMM_VI_GetChnAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, VI_CHN_ATTR_S *pstChnAttr)
{
switch (enSnsType) {
default:
case SONY_IMX290_MIPI_1M_30FPS_12BIT:
case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
#ifdef FPGA_PORTING
case SONY_IMX327_MIPI_1M_30FPS_10BIT:
case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
#endif
memcpy(pstChnAttr, &CHN_ATTR_1280x720_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX327_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_MIPI_2M_60FPS_12BIT:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX307_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
case SONY_IMX307_MIPI_2M_60FPS_12BIT:
case SONY_IMX335_MIPI_2M_60FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX334_MIPI_8M_30FPS_12BIT:
case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX335_MIPI_5M_30FPS_12BIT:
case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_5M_60FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2592x1944_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_4M_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_60FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
memcpy(pstChnAttr, &CHN_ATTR_2560x1600_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SONY_IMX385_MIPI_2M_30FPS_12BIT:
case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case OV_OS08A20_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case OV_OS08A20_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_2592x1944_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case OV_OS08A20_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SOI_F23_MIPI_2M_30FPS_10BIT:
case SOI_F35_MIPI_2M_30FPS_10BIT:
case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SOI_H65_MIPI_1M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_1280x720_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case PIXELPLUS_PR2020_1M_25FPS_8BIT:
case PIXELPLUS_PR2020_1M_30FPS_8BIT:
case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
memcpy(pstChnAttr, &CHN_ATTR_1280x720_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case PICO640_THERMAL_479P:
memcpy(pstChnAttr, &CHN_ATTR_632x479_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case PICO384_THERMAL_384X288:
memcpy(pstChnAttr, &CHN_ATTR_384x288_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case VIVO_MM308M2_2M_25FPS_8BIT:
case NEXTCHIP_N5_2M_25FPS_8BIT:
case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_30FPS_8BIT:
case PIXELPLUS_PR2100_2M_25FPS_8BIT:
case VIVO_MCS369_2M_30FPS_12BIT:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case VIVO_MCS369Q_4M_30FPS_12BIT:
memcpy(pstChnAttr, &CHN_ATTR_2560x1440_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SMS_SC3335_MIPI_3M_30FPS_10BIT:
case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2304x1296_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SMS_SC8238_MIPI_8M_30FPS_10BIT:
case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_3840x2160_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SMS_SC4210_MIPI_4M_30FPS_12BIT:
case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2560x1440_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
#ifdef ARCH_CV183X
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
memcpy(pstChnAttr, &CHN_ATTR_3844x1124_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
memcpy(pstChnAttr, &CHN_ATTR_7688x1124_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
#else
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
memcpy(pstChnAttr, &CHN_ATTR_1920x1080_422_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
#endif
case SONY_IMX347_MIPI_4M_60FPS_12BIT:
case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
memcpy(pstChnAttr, &CHN_ATTR_2688x1520_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
case SMS_SC035GS_1L_MIPI_480P_100FPS_10BIT:
case OV_OV7251_MIPI_480P_100FPS_10BIT:
case OV_OV7750_MIPI_480P_100FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_640x480_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case PIXART_PAG7920_MIPI_240P_100FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_320x240_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
memcpy(pstChnAttr, &CHN_ATTR_2880x1620_420_SDR8_LINEAR, sizeof(VI_CHN_ATTR_S));
break;
}
return CVI_SUCCESS;
}
/******************************************************************************
* funciton : Get enSize by diffrent sensor
******************************************************************************/
CVI_S32 SAMPLE_COMM_VI_GetSizeBySensor(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize)
{
CVI_S32 s32Ret = CVI_SUCCESS;
if (!penSize)
return CVI_FAILURE;
switch (enMode) {
case SONY_IMX290_MIPI_1M_30FPS_12BIT:
case SOI_H65_MIPI_1M_30FPS_10BIT:
case PIXELPLUS_PR2020_1M_25FPS_8BIT:
case PIXELPLUS_PR2020_1M_30FPS_8BIT:
case NEXTCHIP_N5_1M_2CH_25FPS_8BIT:
case GCORE_GC1054_MIPI_1M_30FPS_10BIT:
#ifdef FPGA_PORTING
case SONY_IMX327_MIPI_1M_30FPS_10BIT:
case SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1:
#endif
*penSize = PIC_720P;
break;
case SONY_IMX290_MIPI_2M_60FPS_12BIT:
case SONY_IMX327_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT:
case SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1:
case SOI_F23_MIPI_2M_30FPS_10BIT:
case SOI_F35_MIPI_2M_30FPS_10BIT:
case SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT:
case SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT:
case SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1:
case SONY_IMX385_MIPI_2M_30FPS_12BIT:
case SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1:
case VIVO_MM308M2_2M_25FPS_8BIT:
case NEXTCHIP_N5_2M_25FPS_8BIT:
case NEXTCHIP_N6_2M_4CH_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_25FPS_8BIT:
case PIXELPLUS_PR2020_2M_30FPS_8BIT:
case PIXELPLUS_PR2100_2M_25FPS_8BIT:
case VIVO_MCS369_2M_30FPS_12BIT:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT:
case SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2053_MIPI_2M_30FPS_10BIT:
case GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT:
case GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1:
case GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1:
case SONY_IMX327_MIPI_2M_60FPS_12BIT:
case SONY_IMX307_SUBLVDS_2M_60FPS_12BIT:
case SONY_IMX307_MIPI_2M_60FPS_12BIT:
case GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT:
case SONY_IMX335_MIPI_2M_60FPS_10BIT:
*penSize = PIC_1080P;
break;
case OV_OS08A20_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1:
case SONY_IMX334_MIPI_8M_30FPS_12BIT:
case SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1:
*penSize = PIC_3840x2160;
break;
case OV_OS08A20_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_5M_30FPS_12BIT:
case SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_5M_60FPS_10BIT:
*penSize = PIC_2592x1944;
break;
case SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1:
*penSize = PIC_2560x1600;
break;
case SONY_IMX335_MIPI_4M_30FPS_12BIT:
case SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SONY_IMX335_MIPI_4M_60FPS_10BIT:
case SMS_SC4210_MIPI_4M_30FPS_12BIT:
case SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT:
case OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1:
case GCORE_GC4653_MIPI_4M_30FPS_10BIT:
case SMS_SC500AI_MIPI_4M_30FPS_10BIT:
case SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1:
case SMS_SC401AI_MIPI_4M_30FPS_10BIT:
*penSize = PIC_1440P;
break;
case PICO640_THERMAL_479P:
*penSize = PIC_479P;
break;
case PICO384_THERMAL_384X288:
*penSize = PIC_288P;
break;
case VIVO_MCS369Q_4M_30FPS_12BIT:
*penSize = PIC_1440P;
break;
case SMS_SC3335_MIPI_3M_30FPS_10BIT:
case SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT:
*penSize = PIC_2304x1296;
break;
case SMS_SC8238_MIPI_8M_30FPS_10BIT:
case SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1:
*penSize = PIC_3840x2160;
break;
#ifdef ARCH_CV183X
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
*penSize = PIC_3844x1124;
break;
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
*penSize = PIC_7688x1124;
break;
#else
case PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT:
case PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT:
*penSize = PIC_1080P;
break;
#endif
case SONY_IMX347_MIPI_4M_60FPS_12BIT:
case SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1:
*penSize = PIC_2688x1520;
break;
case SMS_SC035HGS_MIPI_480P_120FPS_12BIT:
case SMS_SC035GS_MIPI_480P_120FPS_12BIT:
case SMS_SC035GS_1L_MIPI_480P_100FPS_10BIT:
case OV_OV7251_MIPI_480P_100FPS_10BIT:
case OV_OV7750_MIPI_480P_100FPS_10BIT:
*penSize = PIC_640x480;
break;
case SMS_SC500AI_MIPI_5M_30FPS_10BIT:
case SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1:
case SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT:
*penSize = PIC_2880x1620;
break;
case PIXART_PAG7920_MIPI_240P_100FPS_10BIT:
*penSize = PIC_240P;
break;
default:
s32Ret = CVI_FAILURE;
break;
}
return s32Ret;
}
static const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT] = {
/* ------ LINEAR BEGIN ------*/
"SONY_IMX290_MIPI_1M_30FPS_12BIT",
"SONY_IMX290_MIPI_2M_60FPS_12BIT",
#ifdef FPGA_PORTING
"SONY_IMX327_MIPI_1M_30FPS_10BIT",
#endif
"SONY_IMX327_MIPI_2M_30FPS_12BIT",
"SONY_IMX307_MIPI_2M_30FPS_12BIT",
"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT",
"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT",
"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT",
"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT",
"OV_OS08A20_MIPI_8M_30FPS_10BIT",
"OV_OS08A20_MIPI_5M_30FPS_10BIT",
"OV_OS08A20_MIPI_4M_30FPS_10BIT",
"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT",
"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT",
"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT",
"OV_OV7251_MIPI_480P_100FPS_10BIT",
"OV_OV7750_MIPI_480P_100FPS_10BIT",
"SOI_F23_MIPI_2M_30FPS_10BIT",
"SOI_F35_MIPI_2M_30FPS_10BIT",
"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT",
"SOI_H65_MIPI_2M_30FPS_10BIT",
"PICO640_THERMAL_479P",
"PIXART_PAG7920_MIPI_240P_100FPS_10BIT",
"PICO384_THERMAL_384X288",
"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT",
"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT",
"VIVO_MCS369Q_4M_30FPS_12BIT",
"VIVO_MM308M2_2M_25FPS_8BIT",
"NEXTCHIP_N5_2M_25FPS_8BIT",
"SMS_SC3335_MIPI_3M_30FPS_10BIT",
"SMS_SC3335_SLAVE_MIPI_3M_30FPS_10BIT",
"SONY_IMX335_MIPI_5M_30FPS_12BIT",
"SONY_IMX335_MIPI_4M_30FPS_12BIT",
"SONY_IMX335_MIPI_4M_1600P_30FPS_12BIT",
"PIXELPLUS_PR2020_1M_25FPS_8BIT",
"SONY_IMX385_MIPI_2M_30FPS_12BIT",
"PIXELPLUS_PR2020_1M_30FPS_8BIT",
"PIXELPLUS_PR2020_2M_25FPS_8BIT",
"PIXELPLUS_PR2020_2M_30FPS_8BIT",
"PIXELPLUS_PR2100_2M_25FPS_8BIT",
"PIXELPLUS_PR2100_2M_2CH_25FPS_8BIT",
"PIXELPLUS_PR2100_2M_4CH_25FPS_8BIT",
"SONY_IMX334_MIPI_8M_30FPS_12BIT",
"SMS_SC8238_MIPI_8M_30FPS_10BIT",
"VIVO_MCS369_2M_30FPS_12BIT",
"SMS_SC4210_MIPI_4M_30FPS_12BIT",
"SMS_SC200AI_MIPI_2M_30FPS_10BIT",
"NEXTCHIP_N6_2M_4CH_25FPS_8BIT",
"NEXTCHIP_N5_1M_2CH_25FPS_8BIT",
"GCORE_GC2053_MIPI_2M_30FPS_10BIT",
"GCORE_GC2053_SLAVE_MIPI_2M_30FPS_10BIT",
"GCORE_GC2093_MIPI_2M_30FPS_10BIT",
"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT",
"GCORE_GC4653_MIPI_4M_30FPS_10BIT",
"SONY_IMX335_MIPI_5M_60FPS_10BIT",
"SONY_IMX335_MIPI_4M_60FPS_10BIT",
"GCORE_GC1054_MIPI_1M_30FPS_10BIT",
"SONY_IMX327_MIPI_2M_60FPS_12BIT",
"SONY_IMX347_MIPI_4M_60FPS_12BIT",
"SONY_IMX307_SUBLVDS_2M_60FPS_12BIT",
"SONY_IMX307_MIPI_2M_60FPS_12BIT",
"GCORE_GC2053_1L_MIPI_2M_30FPS_10BIT",
"SONY_IMX335_MIPI_2M_60FPS_10BIT",
"SMS_SC035HGS_MIPI_480P_120FPS_12BIT",
"SMS_SC500AI_MIPI_5M_30FPS_10BIT",
"SMS_SC500AI_MIPI_4M_30FPS_10BIT",
"SMS_SC501AI_2L_MIPI_5M_30FPS_10BIT",
"SMS_SC401AI_MIPI_4M_30FPS_10BIT",
"SMS_SC035GS_MIPI_480P_120FPS_12BIT",
"SMS_SC035GS_1L_MIPI_480P_100FPS_10BIT",
/* ------ LINEAR END ------*/
/* ------ WDR 2TO1 BEGIN ------*/
"SONY_IMX327_MIPI_2M_30FPS_12BIT_WDR2TO1",
#ifdef FPGA_PORTING
"SONY_IMX327_MIPI_1M_30FPS_10BIT_WDR2TO1",
#endif
"SONY_IMX307_MIPI_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX327_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX327_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX307_2L_MIPI_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX307_SLAVE_MIPI_2M_30FPS_12BIT_WDR2TO1",
"OV_OS08A20_MIPI_8M_30FPS_10BIT_WDR2TO1",
"OV_OS08A20_MIPI_5M_30FPS_10BIT_WDR2TO1",
"OV_OS08A20_MIPI_4M_30FPS_10BIT_WDR2TO1",
"OV_OS08A20_SLAVE_MIPI_8M_30FPS_10BIT_WDR2TO1",
"OV_OS08A20_SLAVE_MIPI_5M_30FPS_10BIT_WDR2TO1",
"OV_OS08A20_SLAVE_MIPI_4M_30FPS_10BIT_WDR2TO1",
"SOI_F35_MIPI_2M_30FPS_10BIT_WDR2TO1",
"SOI_F35_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
"SONY_IMX327_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX307_SUBLVDS_2M_30FPS_12BIT_WDR2TO1",
"SONY_IMX335_MIPI_5M_30FPS_10BIT_WDR2TO1",
"SONY_IMX335_MIPI_4M_30FPS_10BIT_WDR2TO1",
"SONY_IMX335_MIPI_4M_1600P_30FPS_10BIT_WDR2TO1",
"SONY_IMX334_MIPI_8M_30FPS_12BIT_WDR2TO1",
"SONY_IMX385_MIPI_2M_30FPS_12BIT_WDR2TO1",
"SMS_SC8238_MIPI_8M_15FPS_10BIT_WDR2TO1",
"SMS_SC4210_MIPI_4M_30FPS_10BIT_WDR2TO1",
"SMS_SC200AI_MIPI_2M_30FPS_10BIT_WDR2TO1",
"GCORE_GC2093_MIPI_2M_30FPS_10BIT_WDR2TO1",
"GCORE_GC2093_SLAVE_MIPI_2M_30FPS_10BIT_WDR2TO1",
"SONY_IMX347_MIPI_4M_30FPS_12BIT_WDR2TO1",
"SMS_SC500AI_MIPI_5M_30FPS_10BIT_WDR2TO1",
"SMS_SC500AI_MIPI_4M_30FPS_10BIT_WDR2TO1",
/* ------ WDR 2TO1 END ------*/
};
12、
Z:\cv1823\smartpen\osdrv\interdrv\vip\chip\cv182x\cif\cif_drv.c
static void _cif_ttl_config(struct cif_ctx *ctx,
struct param_ttl *param)
{
uintptr_t mac_top = ctx->mac_phys_regs[CIF_MAC_BLK_ID_TOP];
/* Config the sensor mode */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_00, SENSOR_MAC_MODE,
3);
/* Config TTL sensor format */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_SENSOR_BIT,
param->sensor_fmt);
/* Config TTL clock invert */
if (param->vi_from == FROM_VI0) {
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, PAD_VI0_CLK_INV,
param->clk_inv);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_FROM,
0);
} else if (param->vi_from == FROM_VI1) {
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, PAD_VI1_CLK_INV,
param->clk_inv);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_FROM,
1);
} else {
return;
}
switch (param->fmt) {
case TTL_SYNC_PAT_17B_BT1120:
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
TTL_SYNC_PAT_17B_BT1120);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_BT_FMT_OUT,
param->fmt_out);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_VS_BP,
param->v_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_HS_BP,
param->h_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_WD,
param->width);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_HT,
param->height);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_0,
0xFFFF);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_1,
0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_20, TTL_SYNC_2,
0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_VLD,
0x8000);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_BLK,
0xab00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_VLD,
0x9d00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_BLK,
0xb600);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_SEL,
param->vi_sel);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_V_SEL_VS,
1);
break;
case TTL_VHS_19B_BT601:
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
TTL_VHS_19B_BT601);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_BT_FMT_OUT,
param->fmt_out);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_VS_INV,
1);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_HS_INV,
1);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_VS_BP,
param->v_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_HS_BP,
param->h_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_WD,
param->width);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_HT,
param->height);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_0,
0xFFFF);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_SEL,
param->vi_sel);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_V_SEL_VS,
1);
break;
case TTL_SYNC_PAT_9B_BT656:
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
TTL_SYNC_PAT_9B_BT656);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_BT_FMT_OUT,
param->fmt_out);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_VS_BP,
param->v_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_HS_BP,
param->h_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_WD,
param->width);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_HT,
param->height);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_0,
0xFFFF);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_1,
0x0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_20, TTL_SYNC_2,
0x0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_VLD,
0x8000);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_BLK,
0xAB00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_VLD,
0x9D00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_BLK,
0xB600);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_SEL,
param->vi_sel);
break;
case TTL_CUSTOM_0:
/* Config TTL format */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
TTL_VHS_19B_BT601);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_BT_FMT_OUT,
param->fmt_out);
/* Config TTL format */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_BT_FMT_OUT,
TTL_BT_FMT_OUT_CBYCRY);
/* Config HV inverse */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_VS_INV,
1);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_HS_INV,
1);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_VS_BP,
param->v_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_14, TTL_HS_BP,
param->h_bp);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_WD,
param->width);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_HT,
param->height);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_0,
0xFFFF);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_1C, TTL_SYNC_1,
0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_20, TTL_SYNC_2,
0);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_VLD,
0x8000);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_24, TTL_SAV_BLK,
0xab00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_VLD,
0x9d00);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_28, TTL_EAV_BLK,
0xb600);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_SEL,
param->vi_sel);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_V_SEL_VS,
1);
break;
case TTL_VDE_SENSOR:
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
param->fmt);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_SEL,
param->vi_sel);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_WD,
param->width);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_18, TTL_IMG_HT,
param->height);
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_30, VI_V_SEL_VS,
0);
break;
default:
/* Config TTL format */
CIF_WR_BITS(mac_top, REG_SENSOR_MAC_1C4D_T,
REG_10, TTL_FMT_IN,
param->fmt);
break;
}
}
13、
const struct vi_pin_info vi_pin[TTL_VI_SRC_NUM][MAX_PAD_NUM] = {
[TTL_VI_SRC_VI0] = {
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1N_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX1P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0N_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX0P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM0_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP0_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM1_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP1_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXM2_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPI_TXP2_MASK,
1,
},
},
[TTL_VI_SRC_VI1] = {
{
FMUX_GPIO_FUNCSEL_VIVO_D0,
FMUX_GPIO_FUNCSEL_VIVO_D0_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D0_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D1,
FMUX_GPIO_FUNCSEL_VIVO_D1_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D1_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D2,
FMUX_GPIO_FUNCSEL_VIVO_D2_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D2_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D3,
FMUX_GPIO_FUNCSEL_VIVO_D3_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D3_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D4,
FMUX_GPIO_FUNCSEL_VIVO_D4_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D4_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D5,
FMUX_GPIO_FUNCSEL_VIVO_D5_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D5_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D6,
FMUX_GPIO_FUNCSEL_VIVO_D6_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D6_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D7,
FMUX_GPIO_FUNCSEL_VIVO_D7_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D7_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D8,
FMUX_GPIO_FUNCSEL_VIVO_D8_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D8_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D9,
FMUX_GPIO_FUNCSEL_VIVO_D9_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D9_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D10,
FMUX_GPIO_FUNCSEL_VIVO_D10_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D10_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5N_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX5P_MASK,
1,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4N_MASK,
2,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX4P_MASK,
2,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3N_MASK,
2,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX3P_MASK,
2,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2N_MASK,
4,
},
{
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_OFFSET,
FMUX_GPIO_FUNCSEL_PAD_MIPIRX2P_MASK,
4
},
},
[TTL_VI_SRC_VI2] = {
{
FMUX_GPIO_FUNCSEL_VIVO_D0,
FMUX_GPIO_FUNCSEL_VIVO_D0_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D0_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D1,
FMUX_GPIO_FUNCSEL_VIVO_D1_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D1_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D2,
FMUX_GPIO_FUNCSEL_VIVO_D2_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D2_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D3,
FMUX_GPIO_FUNCSEL_VIVO_D3_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D3_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D4,
FMUX_GPIO_FUNCSEL_VIVO_D4_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D4_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D5,
FMUX_GPIO_FUNCSEL_VIVO_D5_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D5_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D6,
FMUX_GPIO_FUNCSEL_VIVO_D6_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D6_MASK,
0,
},
{
FMUX_GPIO_FUNCSEL_VIVO_D7,
FMUX_GPIO_FUNCSEL_VIVO_D7_OFFSET,
FMUX_GPIO_FUNCSEL_VIVO_D7_MASK,
0,
},
},
};
static void cif_config_pinmux(enum ttl_src_e vi, uint32_t pad)
{
mmio_clrsetbits_32(PINMUX_BASE + vi_pin[vi][pad].addr,
vi_pin[vi][pad].mask << vi_pin[vi][pad].offset,
vi_pin[vi][pad].func);
printk("---pad:%d--",pad, vi_pin[vi][pad].mask, vi_pin[vi][pad].offset, vi_pin[vi][pad].func);
}
static int _cif_set_attr_cmos(struct cvi_cif_dev *dev,
struct cif_ctx *ctx,
struct combo_dev_attr_s *attr)
{
struct cif_param *param = ctx->cur_config;
struct param_ttl *ttl = ¶m->cfg.ttl;
enum ttl_src_e vi = attr->ttl_attr.vi;
int i;
if (vi == TTL_VI_SRC_VI2)
return -EINVAL;
/* config the pinmux */
for (i = 0; i < TTL_PIN_FUNC_NUM; i++) {
if (attr->ttl_attr.func[i] < 0)
continue;
if (attr->ttl_attr.func[i] >= TTL_PIN_FUNC_NUM)
return -EINVAL;
cif_set_ttl_pinmux(ctx, vi, i, attr->ttl_attr.func[i]);
cif_config_pinmux(vi, attr->ttl_attr.func[i]);
}
if (vi == TTL_VI_SRC_VI0)
PINMUX_CONFIG(PAD_MIPIRX4N, VI0_CLK);
else if (vi == TTL_VI_SRC_VI1)
PINMUX_CONFIG(VIVO_CLK, VI1_CLK);
else
PINMUX_CONFIG(VIVO_CLK, VI2_CLK);
param->type = CIF_TYPE_TTL;
ttl->vi_from = vi;
ttl->vi_sel = VI_RAW;
ttl->fmt = TTL_VDE_SENSOR;
ttl->width = attr->img_size.width - 1;
ttl->height = attr->img_size.height - 1;
ttl->sensor_fmt = TTL_SENSOR_8_BIT;
cif_streaming(ctx, 1, 0);
return 0;
}
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