Test Bench Verification
The Simulink®
PLC Coder™ software simulates your model and captures the input and output signals
for a subsystem. The captured input and output signal data is the test bench data. You
can generate a test bench or test harness by using the test bench data. See Generate Testbench for Subsystem.
You can verify that the output of the generated code is numerically and functionally
equivalent to the output of the Simulink model by using the generated test bench. This
table shows the error tolerance for the different data types. The comparison is between
the outputs of the generated code (expected values) and outputs of the model (actual
values).
Data TypeComparisonError Toleranceintegerabsolute0
booleanabsolute0
singlerelative0.0001
doublerelative0.00001
The relative tolerance comparison for single or double data types uses
this
logic:
IF ABS(actual_value - expected_value) > (ERROR_TOLERANCE * expected_value) THEN
testVerify := FALSE;
END_IF;
To verify the generated code by using the test bench, import the generated structured
text and the test bench data into your target IDE. You can import test bench code either
manually or automatically. See Import and Verify Structured Text Code.
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