Error(14996): The Fitter failed to find a legal placement for all periphery components
Info(14987): The following components had the most difficulty being legally placed:
Info(175029): LVDS_CLOCK_TREE lvds_inst|lvds_0|core|arch_inst|default_lvds_clock_tree.lvds_clock_tree_inst (27%)
Info(175029): REFCLK_INPUT a10_qsys_inst|emif_a10_hps_0|emif_a10_hps_1|arch|arch_inst|pll_inst|pll_inst~refclk (18%)
Info(175029): HSSI_PMA_AUX ALTERA_RESERVED_FITTER_INSERTED_PMA_AUX1 (18%)
Info(175029): LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|std_tx_outclock_serdes.serdes_dpa_tx_outclock~CHANNEL (18%)
Error(14986): After placing as many components as possible, the following errors remain:
Error(175001): The Fitter cannot place 1 LVDS_CHANNEL, which is within LVDS SERDES Intel FPGA IP lvds_altera_lvds_1940_wr63fyy.
Info(14596): Information about the failing component(s):
Info(175028): The LVDS_CHANNEL name(s): lvds_inst|lvds_0|core|arch_inst|std_tx_outclock_serdes.serdes_dpa_tx_outclock~CHANNEL
Error(16234): No legal location could be found out of 67 considered location(s). Reasons why each location could not be used are summarized below:
Error(179008): Could not find enough available I/O pin locations that can be configured to use a VCCIO voltage of 1.8V (20 locations affected)
Info(175029): pin containing PIN_AG9
Info(175029): pin containing PIN_AH18
Info(175029): pin containing PIN_AH16
Info(175029): pin containing PIN_AH11
Info(175029): pin containing PIN_AH12
Info(175029): pin containing PIN_AH13
Info(175029): pin containing PIN_AB18
Info(175029): pin containing PIN_Y17
Info(175029): pin containing PIN_Y20
Info(175029): pin containing PIN_AA18
Info(175029): pin containing PIN_AC20
Info(175029): pin containing PIN_AH21
Info(175029): and 8 more locations not displayed
Info(175013): The LVDS_CHANNEL is constrained to the region (84, 6) to (84, 44) due to related logic
Error(20196): Location(s) already occupied and the components cannot be merged. (28 locations affected)
Info(175029): AG10. Already placed at this location: pin F_SYNC1_TX
Info(175015): The I/O pad F_SYNC1_TX is constrained to the location PIN_AG10 due to: User Location Constraints (PIN_AG10)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AH18. Already placed at this location: pin F_SYNC2_TX
Info(175015): The I/O pad F_SYNC2_TX is constrained to the location PIN_AH18 due to: User Location Constraints (PIN_AH18)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AH16. Already placed at this location: pin F_SYNC1_RX
Info(175015): The I/O pad F_SYNC1_RX is constrained to the location PIN_AH16 due to: User Location Constraints (PIN_AH16)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AH11. Already placed at this location: pin F_SYNC2_RX
Info(175015): The I/O pad F_SYNC2_RX is constrained to the location PIN_AH11 due to: User Location Constraints (PIN_AH11)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AB18. Already placed at this location: pin F_CHD_REFCLK
Info(175015): The I/O pad F_CHD_REFCLK is constrained to the location PIN_AB18 due to: User Location Constraints (PIN_AB18)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AA17. Already placed at this location: pin F_CON_SRCLK
Info(175015): The I/O pad F_CON_SRCLK is constrained to the location PIN_AA17 due to: User Location Constraints (PIN_AA17)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): Y20. Already placed at this location: pin F_CON_RCLK
Info(175015): The I/O pad F_CON_RCLK is constrained to the location PIN_Y20 due to: User Location Constraints (PIN_Y20)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AA18. Already placed at this location: pin F_165_SH_LD
Info(175015): The I/O pad F_165_SH_LD is constrained to the location PIN_AA18 due to: User Location Constraints (PIN_AA18)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AC20. Already placed at this location: pin emif_hps_mem_mem_dq[15]
Info(175015): The I/O pad emif_hps_mem_mem_dq[15] is constrained to the location PIN_AC20 due to: User Location Constraints (PIN_AC20)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AH21. Already placed at this location: pin emif_hps_mem_mem_dq[14]
Info(175015): The I/O pad emif_hps_mem_mem_dq[14] is constrained to the location PIN_AH21 due to: User Location Constraints (PIN_AH21)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AC21. Already placed at this location: pin emif_hps_mem_mem_dq[11]
Info(175015): The I/O pad emif_hps_mem_mem_dq[11] is constrained to the location PIN_AC21 due to: User Location Constraints (PIN_AC21)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): AH22. Already placed at this location: pin emif_hps_mem_mem_dq[12]
Info(175015): The I/O pad emif_hps_mem_mem_dq[12] is constrained to the location PIN_AH22 due to: User Location Constraints (PIN_AH22)
Info(14709): The constrained I/O pad is contained within this pin
Info(175029): and 16 more locations not displayed
Error(20196): Location(s) already occupied and the components cannot be merged. (3 locations affected)
Info(175029): IOOBUF_X84_Y6_N33. Already placed at this location: I/O output buffer F_RES_IO1~output
Info(175015): The I/O pad F_RES_IO1 is constrained to the location PIN_Y16 due to: User Location Constraints (PIN_Y16)
Info(14709): The constrained I/O pad is contained within a pin, which contains this I/O output buffer
Info(175029): IOOBUF_X84_Y11_N18. Already placed at this location: I/O output buffer F_NDCMOTX_PWM~output
Info(175015): The I/O pad F_NDCMOTX_PWM is constrained to the location PIN_AB13 due to: User Location Constraints (PIN_AB13)
Info(14709): The constrained I/O pad is contained within a pin, which contains this I/O output buffer
Info(175029): IOOBUF_X84_Y10_N18. Already placed at this location: I/O output buffer F_NDCMOTY_PWM~output
Info(175015): The I/O pad F_NDCMOTY_PWM is constrained to the location PIN_AC13 due to: User Location Constraints (PIN_AC13)
Info(14709): The constrained I/O pad is contained within a pin, which contains this I/O output buffer
Error(20196): Location(s) already occupied and the components cannot be merged. (16 locations affected)
Info(175029): LVDS_CHANNEL containing AC12. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[14].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[14] is constrained to the location PIN_AC12 due to: User Location Constraints (PIN_AC12)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AD13. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[0].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[0] is constrained to the location PIN_AD13 due to: User Location Constraints (PIN_AD13)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AA12. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[12].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[12] is constrained to the location PIN_AA12 due to: User Location Constraints (PIN_AA12)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AE17. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[4].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[4] is constrained to the location PIN_AE17 due to: User Location Constraints (PIN_AE17)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AG16. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[8].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[8] is constrained to the location PIN_AG16 due to: User Location Constraints (PIN_AG16)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AE19. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[5].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[5] is constrained to the location PIN_AE19 due to: User Location Constraints (PIN_AE19)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AE12. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[15].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[15] is constrained to the location PIN_AE12 due to: User Location Constraints (PIN_AE12)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AC15. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[2].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[2] is constrained to the location PIN_AC15 due to: User Location Constraints (PIN_AC15)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AC16. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[9].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[9] is constrained to the location PIN_AC16 due to: User Location Constraints (PIN_AC16)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AE16. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[6].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[6] is constrained to the location PIN_AE16 due to: User Location Constraints (PIN_AE16)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AB14. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[13].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[13] is constrained to the location PIN_AB14 due to: User Location Constraints (PIN_AB14)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): LVDS_CHANNEL containing AF17. Already placed at this location: LVDS_CHANNEL lvds_inst|lvds_0|core|arch_inst|channels[3].tx.serdes_dpa_inst~CHANNEL
Info(175015): The I/O pad tx_out[3] is constrained to the location PIN_AF17 due to: User Location Constraints (PIN_AF17)
Info(14709): The constrained I/O pad is contained within a pin, which is contained within this LVDS_CHANNEL
Info(175029): and 4 more locations not displayed
**解决方案：**由于有些管脚分配给了LVDS所在的bank，导致LVDS所在bank的资源比较紧张，1.8v的管脚资源不够，报错。把引起报错的管脚换一个bank绑定即可，同时要注意bank的电压要保持一致，比如使用HPS共享IO资源的话，电平可能要求是1.8V，其余管脚也要设为1.8v。
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