module cds();
always@(posedge clk or negedge rst_n)begin
if(!rst_n)
cnt <= 13'b0;
else if((cnt == 13'd4320-1) || leof )
cnt <= 13'b0;
else if(lsof)
cnt <= cnt + 1'b1;
end
sel = lsof || (cnt != 13'b0);
//----------------------------------------------
//2*4320*(20+4)bit
//----------------------------------------------
sram_din0 = {in_y1,in_y0,fsof_in,feof_in,lsof_in,leof_in};
sram_din1 = {in_y1,in_y0,fsof_in,feof_in,lsof_in,leof_in};
wr_en0 = sel;
wr_en1 = ~sel;
out_y1 = sel ? sram_dout1[23:14] : sram_dout0[23:14];
out_y0 = sel ? sram_dout1[13:4] : sram_dout0[13:4] ;
fsof_out = sel ? sram_dout1[3] : sram_dout0[3];
feof_out = sel ? sram_dout1[2] : sram_dout0[2];
lsof_out = sel ? sram_dout1[1] : sram_dout0[1];
leof_out = sel ? sram_dout1[0] : sram_dout0[0];
//--------------------------------------------------
//4320*40bit
//--------------------------------------------------
wr_en2 = sel;
sram_din2 = {in_u1,in_u0,in_v1,in_v0};
out_u0 = (sram_dout2[39:30] + sram_dout[29:20] + in_u1 + in_u0) >> 2;
out_u1 = (sram_dout2[19:10] + sram_dout[9:0] + in_v1 + in_v0) >> 2;
endmodule
cds_linebuffer
最新推荐文章于 2024-09-27 21:53:49 发布