一个简单的序列检测器
1.1 简介
一个Mealy型序列检测器。可以检测0101序列,当检测到0101序列时,dout输出为高。
1.2 verilog代码
module detector_Mealy(clk,rst_n,din,dout);
input clk,rst_n,din;
output reg dout;
reg [1:0] pre_state,next_state;
parameter s0=2'b00,s1=2'b01,s2=2'b10,s3=2'b11;
always@(posedge clk or negedge rst_n)
if(rst_n==1'b0) pre_state<=s0;
else pre_state<=next_state;
always@(pre_state or din) begin
next_state<=2'bxx;
dout<=1'b0;
case(pre_state)
s0:
begin
if(din==1'b1)
begin
next_state<=s0;
dout<=1'b0;
end
else
begin next_state<=s1;
dout<=1'b0;
end
end
s1:
begin
if(din==1'b1)
begin
next_state<=s2;
dout<=1'b0;
end
else next_state<=s1;
end
s2: