Cygwin综合实现RISC-V出错

RISC-V的例子都要求在LINUX下安装VIVADO，比较麻烦，想在WINDOWS下用Cygwin试试
1.打开cygwin，运行如下命令

export PATH=$PATH:/cygdrive/c/Xilinx/Vivado/2015.2/bin

2.从 github下克隆e200_opensource-master
3.从digilent下载arty-a7-35的board file并放到\Xilinx\Vivado\2015.2\data\boards\board_files目录下
4.切换目录并运行

cd d:/e200_opensource-master/fpga
make install CORE=e203

5.将\e200_opensource-master\fpga\artydevkit\script中的board.tcl打开，将part_board做如下更改：

set part_board {digilentinc.com:arty-a7-35:part0:1.0}

6.生成bit文件

make bit

结果报错：

ERROR: [Vivado 12-172] File or Directory '/cygdrive/d/e200/fpga/install/rtl/core/e203_ifu_ift2icb.v' does not exist
INFO: [Common 17-206] Exiting Vivado at Thu Sep 13 11:10:16 2018...
make[1]: *** [Makefile:18：obj/system.bit] 错误 1
make[1]: 离开目录“/cygdrive/d/e200/fpga/artydevkit”
make: *** [common.mk:41：bit] 错误 2

但实际上该目录下确实是有e203_ifu_ift2icb.v的，百思不得其解。